48 lines
800 B
Plaintext
48 lines
800 B
Plaintext
/*
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* Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <arm/armv6-m.dtsi>
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#include "arty_a7_arm_designstart.dtsi"
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/ {
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model = "Digilent Arty A7 ARM DesignStart Cortex-M1";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m1";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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soc {
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itcm: memory@0 {
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compatible = "arm,itcm";
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reg = <0x00000000 DT_SIZE_K(64)>;
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};
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dtcm: memory@20000000 {
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compatible = "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(32)>;
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};
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bram0: memory@60000000 {
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compatible = "mmio-sram";
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reg = <0x60000000 DT_SIZE_K(64)>;
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <2>;
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};
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