64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/*
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* Copyright (c) 2016 RnDity Sp. z o.o.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file SoC configuration macros for the STM32F3 family processors.
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*
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* Based on reference manual:
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* STM32F303xB/C/D/E, STM32F303x6/8, STM32F328x8, STM32F358xC,
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* STM32F398xE advanced ARM ® -based MCUs
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* STM32F37xx advanced ARM ® -based MCUs
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*
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* Chapter 3.3: Memory organization
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*/
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#ifndef _STM32F3_SOC_H_
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#define _STM32F3_SOC_H_
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#define GPIO_REG_SIZE 0x400
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/* base address for where GPIO registers start */
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#define GPIO_PORTS_BASE (GPIOA_BASE)
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#ifndef _ASMLANGUAGE
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#include <device.h>
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#include <misc/util.h>
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#include <drivers/rand32.h>
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#include <stm32f3xx.h>
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/* IO pin functions */
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enum stm32f3x_pin_config_mode {
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STM32F3X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE = 0,
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STM32F3X_PIN_CONFIG_BIAS_PULL_UP,
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STM32F3X_PIN_CONFIG_BIAS_PULL_DOWN,
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STM32F3X_PIN_CONFIG_ANALOG,
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STM32F3X_PIN_CONFIG_DRIVE_OPEN_DRAIN,
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STM32F3X_PIN_CONFIG_DRIVE_PUSH_PULL,
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STM32F3X_PIN_CONFIG_DRIVE_OPEN_DRAIN_PU,
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STM32F3X_PIN_CONFIG_DRIVE_OPEN_DRAIN_PD,
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STM32F3X_PIN_CONFIG_DRIVE_PUSH_PULL_PU,
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STM32F3X_PIN_CONFIG_DRIVE_PUSH_PULL_PD,
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STM32F3X_PIN_CONFIG_AF,
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};
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#include "soc_irq.h"
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#endif /* !_ASMLANGUAGE */
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#endif /* _STM32F3_SOC_H_ */
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