Daniel DeGrasse 7210174088 dts: nxp: fix address of NXP PFR region for LPC55sx6 SOC ... LPC55sx6 SOC has NXP Manufacturing Programmed Area(NMPA) stored at offsets 0x3EC00-0x3FDFF. Correct uuid offset to be within this region. Fixes #43870 Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>		2022-05-24 08:49:01 -07:00
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arc/synopsys	ARC: boards: HSDK: ged rid of pinmux usage	2022-05-18 17:20:26 +02:00
arm	dts: nxp: fix address of NXP PFR region for LPC55sx6 SOC	2022-05-24 08:49:01 -07:00
arm64	boards: imx8mp: partial pin control support	2022-05-12 16:57:17 -05:00
bindings	dts: bindings: fix various header file path	2022-05-20 19:22:20 -07:00
common	…
nios2/intel	dts: nios2: intel: Move SoC devicetree includes under a vendor directory	2022-05-09 17:54:48 -04:00
posix	…
riscv	esp32/s2/c3: pinctrl: dts: move pinctrl node out of SoC bus	2022-05-13 11:25:58 -07:00
sparc/gaisler	dts: sparc: gaisler: Move SoC devicetree includes under a vendor dir	2022-05-09 17:54:48 -04:00
x86/intel	dts: x86: intel: Move SoC devicetree includes under a vendor directory	2022-05-09 17:54:48 -04:00
xtensa	esp32/s2/c3: pinctrl: dts: move pinctrl node out of SoC bus	2022-05-13 11:25:58 -07:00
Kconfig	…
binding-template.yaml	…