Andy Ross ae4f7a1a06 arch/xtensa: Remember to spill windows in arch_cohere_stacks() ... When we reach this code in interrupt context, our upper GPRs contain a cross-stack call that may still include some registers from the interrupted thread. Those need to go out to memory before we can do our cache coherence dance here. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>		2021-03-08 11:14:27 -05:00
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kernel_arch_func.h	arch/xtensa: Remember to spill windows in arch_cohere_stacks()	2021-03-08 11:14:27 -05:00
offsets_short_arch.h	arch/xtensa: General cleanup, remove dead code	2021-03-08 11:14:27 -05:00
xtensa-asm2-context.h	…
xtensa-asm2-s.h	arch/xtensa: Remember to spill windows in arch_cohere_stacks()	2021-03-08 11:14:27 -05:00
xtensa-asm2.h	…