206 lines
8.2 KiB
C
206 lines
8.2 KiB
C
/*
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* Copyright (c) 2016, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL CORPORATION OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __FLASH_LAYOUT_H__
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#define __FLASH_LAYOUT_H__
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/**
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* Flash Layout for Quark SE Microcontrollers.
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*
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* @defgroup groupSEFlash Quark SE Flash Layout
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* @{
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*/
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typedef struct {
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QM_RW uint32_t magic; /**< Magic Number. */
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QM_RW uint16_t version; /**< 0x0100. */
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QM_RW uint16_t reserved; /**< Reserved. */
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QM_RW uint16_t osc_trim_32mhz; /**< 32MHz Oscillator trim code. */
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QM_RW uint16_t osc_trim_16mhz; /**< 16MHz Oscillator trim code. */
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QM_RW uint16_t osc_trim_8mhz; /**< 8MHz Oscillator trim code. */
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QM_RW uint16_t osc_trim_4mhz; /**< 4MHz Oscillator trim code. */
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} qm_flash_otp_trim_t;
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#if (UNIT_TEST)
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extern uint8_t test_flash_page[0x800];
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#define QM_FLASH_OTP_TRIM_CODE_BASE (&test_flash_page[0])
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#else
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#define QM_FLASH_OTP_TRIM_CODE_BASE (0xFFFFE1F0)
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#endif
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#define QM_FLASH_OTP_TRIM_CODE \
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((qm_flash_otp_trim_t *)QM_FLASH_OTP_TRIM_CODE_BASE)
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#define QM_FLASH_OTP_SOC_DATA_VALID (0x24535021) /* $SP! */
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#define QM_FLASH_OTP_TRIM_MAGIC (QM_FLASH_OTP_TRIM_CODE->magic)
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typedef union {
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struct trim_fields {
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QM_RW uint16_t
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osc_trim_32mhz; /**< 32MHz Oscillator trim code. */
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QM_RW uint16_t
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osc_trim_16mhz; /**< 16MHz Oscillator trim code. */
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QM_RW uint16_t osc_trim_8mhz; /**< 8MHz Oscillator trim code. */
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QM_RW uint16_t osc_trim_4mhz; /**< 4MHz Oscillator trim code. */
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} fields;
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QM_RW uint32_t osc_trim_u32[2]; /**< Oscillator trim code array.*/
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QM_RW uint16_t osc_trim_u16[4]; /**< Oscillator trim code array.*/
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} qm_flash_data_trim_t;
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#if (UNIT_TEST)
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#define QM_FLASH_DATA_TRIM_BASE (&test_flash_page[100])
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#define QM_FLASH_DATA_TRIM_OFFSET (100)
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#else
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#define QM_FLASH_DATA_TRIM_BASE (0x4002F000)
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#define QM_FLASH_DATA_TRIM_OFFSET ((uint32_t)QM_FLASH_DATA_TRIM_BASE & 0x3FFFF)
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#endif
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#define QM_FLASH_DATA_TRIM ((qm_flash_data_trim_t *)QM_FLASH_DATA_TRIM_BASE)
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#define QM_FLASH_DATA_TRIM_CODE (&QM_FLASH_DATA_TRIM->fields)
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#define QM_FLASH_DATA_TRIM_REGION QM_FLASH_REGION_SYS
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#define QM_FLASH_TRIM_PRESENT_MASK (0xFC00)
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#define QM_FLASH_TRIM_PRESENT (0x0000)
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/*
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* Bootloader data
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*/
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/* The flash controller where BL-Data is stored. */
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#define BL_DATA_FLASH_CONTROLLER QM_FLASH_0
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/* The flash region where BL-Data is stored. */
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#define BL_DATA_FLASH_REGION QM_FLASH_REGION_SYS
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/* The flash address where the BL-Data Section starts. */
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#define BL_DATA_FLASH_REGION_BASE QM_FLASH_REGION_SYS_0_BASE
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/* The flash page where the BL-Data Section starts. */
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#define BL_DATA_SECTION_BASE_PAGE (94)
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/* The size (in pages) of the System_0 flash region of Quark SE. */
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#define QM_FLASH_REGION_SYS_0_PAGES (96)
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/* The size (in pages) of the System_1 flash region of Quark SE. */
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#define QM_FLASH_REGION_SYS_1_PAGES (96)
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/* The size (in pages) of the Bootloader Data section. */
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#define BL_DATA_SECTION_PAGES (2)
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#if (BL_CONFIG_DUAL_BANK)
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/* ARC Partition size, in pages */
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#define BL_PARTITION_SIZE_ARC \
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((QM_FLASH_REGION_SYS_0_PAGES - BL_DATA_SECTION_PAGES) / 2)
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#define BL_PARTITION_SIZE_LMT (QM_FLASH_REGION_SYS_1_PAGES / 2)
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#else /* !BL_CONFIG_DUAL_BANK */
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#define BL_PARTITION_SIZE_ARC \
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((QM_FLASH_REGION_SYS_0_PAGES - BL_DATA_SECTION_PAGES))
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#define BL_PARTITION_SIZE_LMT (QM_FLASH_REGION_SYS_1_PAGES)
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#endif /* BL_CONFIG_DUAL_BANK */
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/* Number of boot targets. */
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#define BL_BOOT_TARGETS_NUM (2)
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#define BL_TARGET_IDX_LMT (0)
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#define BL_TARGET_IDX_ARC (1)
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#define BL_PARTITION_IDX_LMT0 (0)
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#define BL_PARTITION_IDX_ARC0 (1)
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#define BL_PARTITION_IDX_LMT1 (2)
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#define BL_PARTITION_IDX_ARC1 (3)
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#define BL_TARGET_0_LMT \
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{ \
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.active_partition_idx = BL_PARTITION_IDX_LMT0, .svn = 0 \
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}
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#define BL_TARGET_1_ARC \
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{ \
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.active_partition_idx = BL_PARTITION_IDX_ARC0, .svn = 0 \
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}
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/*
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* Macro for defining an application flash partition.
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*
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* @param[in] target The index of the target associated with the partition.
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* @param[in] ctrl The flash controller on which the partition is located.
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* @param[in] region_addr The base address of the region where the partition is
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* located.
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* @param[in] size The size in pages of the partition.
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* @param[in] idx The index of the partition within the flash region (0 for
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* the first partition in the region, 1 for the second one).
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*/
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#define DEFINE_PARTITION(target, ctrl, region_addr, size, idx) \
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{ \
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.target_idx = target, .controller = ctrl, \
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.first_page = (idx * size), .num_pages = size, \
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.start_addr = ((uint32_t *)region_addr) + \
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(idx * size * QM_FLASH_PAGE_SIZE_DWORDS), \
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.is_consistent = true \
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}
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/* PARTITION 0: LMT-0 */
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#define BL_PARTITION_0 \
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DEFINE_PARTITION(BL_TARGET_IDX_LMT, QM_FLASH_1, \
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QM_FLASH_REGION_SYS_1_BASE, BL_PARTITION_SIZE_LMT, 0)
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/* PARTITION 1: ARC-0 */
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#define BL_PARTITION_1 \
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DEFINE_PARTITION(BL_TARGET_IDX_ARC, QM_FLASH_0, \
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QM_FLASH_REGION_SYS_0_BASE, BL_PARTITION_SIZE_ARC, 0)
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/* PARTITION 2: LMT-1 */
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#define BL_PARTITION_2 \
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DEFINE_PARTITION(BL_TARGET_IDX_LMT, QM_FLASH_1, \
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QM_FLASH_REGION_SYS_1_BASE, BL_PARTITION_SIZE_LMT, 1)
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/* PARTITION 3: ARC-1 */
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#define BL_PARTITION_3 \
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DEFINE_PARTITION(BL_TARGET_IDX_ARC, QM_FLASH_0, \
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QM_FLASH_REGION_SYS_0_BASE, BL_PARTITION_SIZE_ARC, 1)
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#define BL_TARGET_LIST \
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{ \
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BL_TARGET_0_LMT, BL_TARGET_1_ARC \
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}
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#if BL_CONFIG_DUAL_BANK
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#define BL_PARTITION_LIST \
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{ \
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BL_PARTITION_0, BL_PARTITION_1, BL_PARTITION_2, BL_PARTITION_3 \
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}
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#else /* !BL_CONFIG_DUAL_BANK */
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#define BL_PARTITION_LIST \
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{ \
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BL_PARTITION_0, BL_PARTITION_1 \
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}
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#endif /* BL_CONFIG_DUAL_BANK */
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/**
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* @}
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*/
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#endif /* __FLASH_LAYOUT_H__ */
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