112 lines
1.9 KiB
Plaintext
112 lines
1.9 KiB
Plaintext
/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv8-m.dtsi>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m33f";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <16>;
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};
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};
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};
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aliases {
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flash-controller = &flash_controller;
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rtc-0 = &rtc0;
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rtc-1 = &rtc1;
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uart-0 = &uart0;
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uart-1 = &uart1;
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adc-0 = &adc;
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egu-0 = &egu0;
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egu-1 = &egu1;
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egu-2 = &egu2;
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egu-3 = &egu3;
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egu-4 = &egu4;
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egu-5 = &egu5;
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gpio-0 = &gpio0;
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gpio-1 = &gpio1;
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gpiote-0 = &gpiote;
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i2c-0 = &i2c0;
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i2c-1 = &i2c1;
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ipc-0 = &ipc;
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pdm-0 = &pdm0;
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spi-0 = &spi0;
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spi-1 = &spi1;
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spi-2 = &spi2;
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pwm-0 = &pwm0;
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pwm-1 = &pwm1;
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pwm-2 = &pwm2;
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wdt-0 = &wdt;
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timer-0 = &timer0;
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timer-1 = &timer1;
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timer-2 = &timer2;
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};
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soc {
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sram0: memory@20000000 {
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compatible = "mmio-sram";
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};
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peripheral@50000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x50000000 0x10000000>;
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/* Common nRF5340 Application MCU
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* peripheral description
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*/
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#include "nrf5340_cpuapp_common.dtsi"
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};
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/* Additional Secure peripherals */
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gpiote: gpiote@5000d000 {
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compatible = "nordic,nrf-gpiote";
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reg = <0x5000d000 0x1000>;
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interrupts = <13 5>;
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status = "disabled";
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label = "GPIOTE_0";
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};
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spu: spu@50003000 {
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compatible = "nordic,nrf-spu";
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reg = <0x50003000 0x1000>;
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interrupts = <3 1>;
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status = "okay";
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};
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ficr: ficr@ff0000 {
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compatible = "nordic,nrf-ficr";
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reg = <0xff0000 0x1000>;
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status = "okay";
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};
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uicr: uicr@ff8000 {
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compatible = "nordic,nrf-uicr";
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reg = <0xff8000 0x1000>;
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status = "okay";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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