zephyr/dts
Olof Johansson 07ac630281 dts: riscv: add #address-cells to all interrupt controllers
This mirrors #36499 and other PRs that added them for other
architectures.

This silences a large number of dtc warnings due to the missing
property. It seems reasonable to require an address-cells property since
any interrupt controller could be the parent of an interrupt-map.

The only device actually using interrupt-maps is neorv32, and it needs
an address-cells of 2 (since this is the default if none is specified it
worked like that before this change).

While I touched this, I reordered the properties for consistency across
boards, but there's a lot of variance here already.

Signed-off-by: Olof Johansson <olof@lixom.net>
2022-07-04 14:39:43 -04:00
..
arc/synopsys dts: add reg-shift property to all ns16550 devices 2022-06-15 16:59:02 -05:00
arm dts: stm32: Populate "st,stm32h7-spi" compatible when required 2022-07-04 14:23:34 +00:00
arm64 dts: arm64: intel: Enable Arm Timer for Intel Agilex SoC FPGA 2022-06-27 08:52:01 -05:00
bindings dts: binding: ipm: Remove unused zephyr,ipm-console binding 2022-07-04 18:08:56 +02:00
common
nios2/intel dts: add reg-shift property to all ns16550 devices 2022-06-15 16:59:02 -05:00
posix
riscv dts: riscv: add #address-cells to all interrupt controllers 2022-07-04 14:39:43 -04:00
sparc/gaisler dts: sparc: gaisler: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
x86/intel dts: x86: intel: ia32: fix uart reg-shift 2022-06-17 10:45:28 -05:00
xtensa dts: esp32: full ledc configuration in binding 2022-06-29 14:48:25 +00:00
Kconfig drivers: gpio: remove unused HAS_DTS_GPIO Kconfig symbol 2022-06-10 09:47:31 +02:00
binding-template.yaml