91 lines
2.1 KiB
ArmAsm
91 lines
2.1 KiB
ArmAsm
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Watchdog initialization for fsl_frdm_k64f platform
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*
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* This module initializes the watchdog for the fsl_frdm_k64f platform.
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*/
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#define _ASMLANGUAGE
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#include <soc.h>
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#include <toolchain.h>
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#include <sections.h>
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_ASM_FILE_PROLOGUE
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GTEXT(_WdogInit)
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/* watchdog register offsets */
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#define WDOG_SCTRL_HI_OFFSET 0x0
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#define WDOG_UNLOCK_OFFSET 0xE
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/* watchdog command words */
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#define WDOG_UNLOCK_1_CMD 0xC520
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#define WDOG_UNLOCK_2_CMD 0xD928
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/**
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*
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* @brief Watchdog timer disable routine
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*
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* This routine will disable the watchdog timer.
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*
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* @return N/A
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*/
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SECTION_FUNC(TEXT,_WdogInit)
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/*
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* NOTE: DO NOT SINGLE STEP THROUGH THIS FUNCTION!!!
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* There are timing requirements for the execution of the unlock process.
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* Single stepping through the code will cause the CPU to reset.
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*/
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/*
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* First unlock the watchdog so that we can write to registers.
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*
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* This sequence must execute within 20 clock cycles, so disable
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* interrupts to keep the code atomic and ensure the timing.
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*/
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cpsid i
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ldr r0, =PERIPH_ADDR_BASE_WDOG
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movw r1, #WDOG_UNLOCK_1_CMD
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strh r1, [r0, #WDOG_UNLOCK_OFFSET]
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movw r1, #WDOG_UNLOCK_2_CMD
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strh r1, [r0, #WDOG_UNLOCK_OFFSET]
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/*
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* Disable the watchdog.
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*
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* Writes to control/configuration registers must execute within
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* 256 clock cycles after unlocking.
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*/
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ldrh r1, [r0, #WDOG_SCTRL_HI_OFFSET]
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mov r2, #1
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bics r1, r2
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strh r1, [r0, #WDOG_SCTRL_HI_OFFSET]
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cpsie i
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bx lr
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