92 lines
1.8 KiB
Plaintext
92 lines
1.8 KiB
Plaintext
/*
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* Copyright (c) 2017 BayLibre, SAS
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/f0/stm32f0.dtsi>
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/ {
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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erase-block-size = <2048>;
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};
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};
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pinctrl: pin-controller@48000000 {
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gpioe: gpio@48001000 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48001000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00200000>;
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label = "GPIOE";
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};
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};
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timers2: timers@40000000 {
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compatible = "st,stm32-timers";
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reg = <0x40000000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000001>;
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status = "disabled";
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label = "TIMERS_2";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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st,prescaler = <0>;
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label = "PWM_2";
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#pwm-cells = <2>;
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};
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};
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spi2: spi@40003800 {
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compatible = "st,stm32-spi-fifo";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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interrupts = <26 3>;
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status = "disabled";
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label = "SPI_2";
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};
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usb: usb@40005c00 {
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compatible = "st,stm32-usb";
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reg = <0x40005c00 0x400>;
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interrupts = <31 0>;
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interrupt-names = "usb";
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num-bidir-endpoints = <8>;
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ram-size = <1024>;
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phys = <&usb_fs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
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status = "disabled";
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label= "USB";
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};
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can1: can@40006400 {
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compatible = "st,stm32-can";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40006400 0x400>;
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interrupts = <30 0>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>;
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status = "disabled";
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label = "CAN_1";
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bus-speed = <250000>;
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sjw = <1>;
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prop-seg = <0>;
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phase-seg1 = <5>;
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phase-seg2 = <6>;
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};
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};
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usb_fs_phy: usbphy {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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label = "USB_FS_PHY";
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};
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};
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