195 lines
4.2 KiB
Plaintext
195 lines
4.2 KiB
Plaintext
/*
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* Copyright (c) 2017 Florian Vaussard, HEIG-VD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/f4/stm32f411.dtsi>
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/ {
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soc {
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pinctrl: pin-controller@40020000 {
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gpiof: gpio@40021400 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40021400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
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label = "GPIOF";
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};
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gpiog: gpio@40021800 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40021800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000040>;
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label = "GPIOG";
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};
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};
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timers6: timers@40001000 {
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compatible = "st,stm32-timers";
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reg = <0x40001000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>;
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status = "disabled";
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label = "TIMERS_6";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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st,prescaler = <10000>;
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label = "PWM_6";
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#pwm-cells = <2>;
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};
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};
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timers7: timers@40001400 {
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compatible = "st,stm32-timers";
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reg = <0x40001400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
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status = "disabled";
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label = "TIMERS_7";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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st,prescaler = <10000>;
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label = "PWM_7";
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#pwm-cells = <2>;
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};
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};
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timers12: timers@40001800 {
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compatible = "st,stm32-timers";
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reg = <0x40001800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000040>;
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status = "disabled";
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label = "TIMERS_12";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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st,prescaler = <10000>;
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label = "PWM_12";
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#pwm-cells = <2>;
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};
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};
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timers13: timers@40001c00 {
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compatible = "st,stm32-timers";
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reg = <0x40001c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000080>;
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status = "disabled";
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label = "TIMERS_13";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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st,prescaler = <10000>;
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label = "PWM_13";
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#pwm-cells = <2>;
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};
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};
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timers14: timers@40002000 {
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compatible = "st,stm32-timers";
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reg = <0x40002000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000100>;
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status = "disabled";
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label = "TIMERS_14";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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st,prescaler = <10000>;
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label = "PWM_14";
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#pwm-cells = <2>;
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};
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};
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usart3: serial@40004800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
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interrupts = <39 0>;
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status = "disabled";
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label = "UART_3";
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};
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uart4: serial@40004c00 {
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compatible ="st,stm32-uart";
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reg = <0x40004c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
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interrupts = <52 0>;
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status = "disabled";
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label = "UART_4";
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};
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uart5: serial@40005000 {
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compatible = "st,stm32-uart";
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reg = <0x40005000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
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interrupts = <53 0>;
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status = "disabled";
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label = "UART_5";
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};
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uart7: serial@40007800 {
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compatible = "st,stm32-uart";
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reg = <0x40007800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>;
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interrupts = <82 0>;
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status = "disabled";
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label = "UART_7";
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};
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uart8: serial@40007c00 {
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compatible = "st,stm32-uart";
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reg = <0x40007c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>;
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interrupts = <83 0>;
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status = "disabled";
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label = "UART_8";
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};
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timers8: timers@40010400 {
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compatible = "st,stm32-timers";
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reg = <0x40010400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000002>;
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status = "disabled";
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label = "TIMERS_8";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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st,prescaler = <10000>;
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label = "PWM_8";
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#pwm-cells = <2>;
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};
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};
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uart9: serial@40011800 {
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compatible = "st,stm32-uart";
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reg = <0x40011800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000040>;
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interrupts = <88 0>;
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status = "disabled";
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label = "UART_9";
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};
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uart10: serial@40011c00 {
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compatible = "st,stm32-uart";
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reg = <0x40011c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000080>;
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interrupts = <89 0>;
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status = "disabled";
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label = "UART_10";
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};
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usbotg_fs: usb@50000000 {
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num-bidir-endpoints = <6>;
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};
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};
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};
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