38 lines
672 B
Plaintext
38 lines
672 B
Plaintext
/*
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* Copyright (c) 2020 Paul M. Bendixen
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <st/f3/stm32f303.dtsi>
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/ {
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ccm0: memory@10000000 {
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compatible = "st,stm32-ccm";
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reg = <0x10000000 DT_SIZE_K(16)>;
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};
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_K(512)>;
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};
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};
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dma2: dma@40020400 {
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compatible = "st,stm32-dma";
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#dma-cells = <4>;
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reg = <0x40020400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
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interrupts = <56 0 57 0 58 0 59 0 60 0>;
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status = "disabled";
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label = "DMA_2";
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};
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};
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};
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