zephyr/dts/xtensa/espressif/esp32s3
Sylvio Alves e48fe49a70 soc: esp32s3: appcpu: add sram dts information
Make sure SoC has defined RAM size.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-20 07:55:09 -05:00
..
esp32s3.dtsi
esp32s3_appcpu.dtsi
esp32s3_common.dtsi
esp32s3_fn8.dtsi
esp32s3_mini_n4r2.dtsi
esp32s3_mini_n8.dtsi
esp32s3_pico_n8r2.dtsi
esp32s3_pico_n8r8.dtsi
esp32s3_r2.dtsi
esp32s3_r8.dtsi
esp32s3_r8v.dtsi
esp32s3_wroom_n4.dtsi
esp32s3_wroom_n4r2.dtsi
esp32s3_wroom_n4r8.dtsi
esp32s3_wroom_n8.dtsi
esp32s3_wroom_n8r2.dtsi
esp32s3_wroom_n8r8.dtsi
esp32s3_wroom_n16.dtsi
esp32s3_wroom_n16r2.dtsi
esp32s3_wroom_n16r8.dtsi