27 lines
1005 B
Plaintext
27 lines
1005 B
Plaintext
/* SoC level DTS fixup file */
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#define CONFIG_UART_QMSI_0_BAUDRATE INTEL_QMSI_UART_B0002000_CURRENT_SPEED
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#define CONFIG_UART_QMSI_0_NAME INTEL_QMSI_UART_B0002000_LABEL
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#define CONFIG_UART_QMSI_0_IRQ INTEL_QMSI_UART_B0002000_IRQ_0
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#define CONFIG_UART_QMSI_1_BAUDRATE INTEL_QMSI_UART_B0002400_CURRENT_SPEED
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#define CONFIG_UART_QMSI_1_NAME INTEL_QMSI_UART_B0002400_LABEL
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#define CONFIG_UART_QMSI_1_IRQ INTEL_QMSI_UART_B0002400_IRQ_0
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#define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
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#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS
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#define CONFIG_RAM_SIZE CONFIG_SRAM_SIZE
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#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
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#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS
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#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
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#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
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#define CONFIG_I2C_1_NAME INTEL_QMSI_I2C_B0002C00_LABEL
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#define CONFIG_I2C_1_BITRATE INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
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/* End of SoC Level DTS fixup file */
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