zephyr/soc/nxp/imxrt/Kconfig.defconfig

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# Copyright 2017-2024 NXP
# SPDX-License-Identifier: Apache-2.0
if SOC_FAMILY_NXP_IMXRT
# Source series Kconfig files first, so SOCs
# can override the defaults given here
rsource "*/Kconfig.defconfig"
if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX
config SERIAL_INIT_PRIORITY
default 55 if SERIAL
depends on SERIAL
config ROM_START_OFFSET
default 0x400 if BOOTLOADER_MCUBOOT
default 0x2000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
config PINCTRL_IMX
default y if HAS_MCUX_IOMUXC
depends on PINCTRL
config ADC_MCUX_12B1MSPS_SAR
default y if HAS_MCUX_12B1MSPS_SAR
depends on ADC
config LOG_BACKEND_SWO_FREQ_HZ
default 7500000
depends on LOG_BACKEND_SWO
# set the tick per sec as a divider of the GPT clock source
config SYS_CLOCK_TICKS_PER_SEC
default 4096 if MCUX_GPT_TIMER
DT_SYSCLK_PATH := $(dt_nodelabel_path,sysclk)
config SYS_CLOCK_HW_CYCLES_PER_SEC
default $(dt_node_int_prop_int,$(DT_SYSCLK_PATH),clock-frequency) if SOC_SERIES_IMXRT10XX && CORTEX_M_SYSTICK
default 32768 if MCUX_GPT_TIMER
# Disable systick if using MCUX_GPT_TIMER, as they will conflict
config CORTEX_M_SYSTICK
default n if MCUX_GPT_TIMER
config PM_MCUX_GPC
default y if HAS_MCUX_GPC
depends on SOC_SERIES_IMXRT11XX && PM
# Don't allow SOC to sleep after tests complete when PM is enabled
config ZTEST_NO_YIELD
default y if (ZTEST && PM)
if SOC_SERIES_IMXRT10XX && PM
config CODE_DATA_RELOCATION
default y
config PM_MCUX_GPC
default y if HAS_MCUX_GPC
config PM_MCUX_DCDC
default y if HAS_MCUX_DCDC
config PM_MCUX_PMU
default y if HAS_MCUX_PMU
endif # SOC_SERIES_IMXRT10XX && PM
if ETH_NXP_ENET
config SYSTEM_WORKQUEUE_STACK_SIZE
default 1560
endif # ETH_NXP_ENET
config MEMC
default y
choice USB_MCUX_CONTROLLER_TYPE
default USB_DC_NXP_EHCI
endchoice
DT_CHOSEN_Z_DTCM := zephyr,dtcm
choice SEGGER_RTT_SECTION
default SEGGER_RTT_SECTION_DTCM if $(dt_chosen_enabled,$(DT_CHOSEN_Z_DTCM))
depends on USE_SEGGER_RTT
endchoice
choice SEGGER_SYSVIEW_SECTION
default SEGGER_SYSVIEW_SECTION_DTCM if $(dt_chosen_enabled,$(DT_CHOSEN_Z_DTCM))
depends on SEGGER_SYSTEMVIEW
endchoice
#
# MBEDTLS is larger but much faster than TinyCrypt so choose wisely
#
config MBEDTLS
#config TINYCRYPT
default y if CSPRNG_ENABLED
depends on ENTROPY_GENERATOR
if MBEDTLS
#
# MBEDTLS CTR_DRBG code path needs extra stack space for initialization than
# what the ztest_thread_stack defaults to.
#
config TEST_EXTRA_STACK_SIZE
int
default 1024
endif # MBEDTLS
# Enable cache management features when using M7 core, since these parts
# have L1 instruction and data caches that should be enabled at boot
config CACHE_MANAGEMENT
default y if CPU_CORTEX_M7
endif # SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX
# Logic to set flash size for all IMXRT parts
DT_CHOSEN_Z_FLASH := zephyr,flash
DT_COMPAT_FLEXSPI := nxp,imx-flexspi
DT_CHOSEN_FLASH_NODE := $(dt_chosen_path,$(DT_CHOSEN_Z_FLASH))
DT_CHOSEN_FLASH_PARENT := $(dt_node_parent,$(DT_CHOSEN_FLASH_NODE))
DT_FLASH_PARENT_IS_FLEXSPI := $(dt_node_has_compat,$(DT_CHOSEN_FLASH_PARENT),$(DT_COMPAT_FLEXSPI))
DT_FLASH_HAS_SIZE_PROP := $(dt_node_has_prop,$(DT_CHOSEN_FLASH_NODE),size)
config FLASH_BASE_ADDRESS
default $(dt_node_reg_addr_hex,$(DT_CHOSEN_FLASH_PARENT),1) \
if $(DT_FLASH_PARENT_IS_FLEXSPI)
config FLASH_SIZE
default $(dt_node_int_prop_int,$(DT_CHOSEN_FLASH_NODE),size,Kb) \
if $(DT_FLASH_HAS_SIZE_PROP)
if FLASH_MCUX_FLEXSPI_XIP
# Avoid RWW hazards by defaulting logging to disabled
choice FLASH_LOG_LEVEL_CHOICE
default FLASH_LOG_LEVEL_OFF
endchoice
choice MEMC_LOG_LEVEL_CHOICE
default MEMC_LOG_LEVEL_OFF
endchoice
endif
endif # SOC_FAMILY_NXP_IMXRT