29 lines
680 B
ArmAsm
29 lines
680 B
ArmAsm
/*
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* Copyright (c) 2021 Henrik Brix Andersen <henrik@brixandersen.dk>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/toolchain.h>
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GTEXT(__soc_handle_irq)
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/*
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* SOC-specific function to handle pending IRQ number generating the interrupt.
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* Exception number is given as parameter via register a0.
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*/
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SECTION_FUNC(exception.other, __soc_handle_irq)
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/*
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* The the MIP CSR on the NEORV32 is read-only and can thus not be used for
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* clearing a pending IRQ. Instead we disable the IRQ in the MIE CSR and
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* re-enable it (if it was enabled when clearing).
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*/
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li t1, 1
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sll t0, t1, a0
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csrrc t2, mie, t0
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and t1, t2, t0
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csrrs t2, mie, t1
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/* Return */
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ret
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