zephyr/samples/drivers/espi
Kumar Gala 5281b58d29 samples: espi: disable SAF testing
espi saf node is not enabled in mec15xxevb_assy6853.dts so the sample
will fail to build.  For now disable CONFIG_ESPI_SAF to get the sample
to build.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 17:59:05 +02:00
..
boards samples: drivers: espi: Convert to use DT_NODELABEL 2022-07-21 06:06:02 -05:00
dts/bindings
src samples: drivers: espi: Convert to use DT_NODELABEL 2022-07-21 06:06:02 -05:00
CMakeLists.txt
Kconfig
README.rst
prj.conf
prj_mec15xxevb_assy6853.conf samples: espi: disable SAF testing 2022-08-12 17:59:05 +02:00
prj_mec1501modular_assy6885.conf
prj_npcx7m6fb_evb.conf
sample.yaml

README.rst

.. _espi-sample:

Enhanced Serial Peripheral Interface
####################################

Overview
********

This sample demonstrates how to use the Enhanced Serial Peripheral Interface
(eSPI) API.
It shows how to configure and select eSPI controller capabilities as part of
a simple eSPI handshake that includes exchanging virtual wire packets.

Standard platform signals are sent virtual wire packets over the bus.
Callbacks are registered that will write to the console indicating main
eSPI events and when a virtual wire is received.

Building and Running
********************

The sample can be built and executed on boards supporting eSPI.
Any pins required for minimum eSPI handshake should be configured.
Sample requires a correct harness and fixture setup.
Please connect an eSPI device to the testing board.
After that for the correct execution of that sample in twister, add into
boards's map-file next fixture settings::

      - fixture: espi_device_connect

Sample output
=============

.. code-block:: console

   Hello eSPI test!
   eSPI test - I/O initialization...complete
   eSPI slave configured successfully!
   eSPI test - callbacks initialization... complete
   eSPI test - callbacks registration... complete
   eSPI test - Power initialization...complete
   eSPI test - Handshake
   eSPI BUS reset 0
   VW channel is ready

   PLT_RST changed 1
        1st phase completed
        2nd phase completed
        3rd phase completed

note:: The values shown above might differ.