108 lines
2.2 KiB
Plaintext
108 lines
2.2 KiB
Plaintext
/*
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* Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <arm64/armv8-r.dtsi>
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#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-r82";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-r82";
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reg = <1>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-r82";
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reg = <2>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-r82";
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reg = <3>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&gic>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>;
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};
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uartclk: apb-pclk {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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#clock-cells = <0>;
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};
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soc {
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interrupt-parent = <&gic>;
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gic: interrupt-controller@af000000 {
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compatible = "arm,gic";
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reg = <0xaf000000 0x1000>,
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<0xaf100000 0x100>;
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interrupt-controller;
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#interrupt-cells = <4>;
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status = "okay";
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};
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uart0: uart@9c090000 {
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compatible = "arm,pl011";
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reg = <0x9c090000 0x1000>;
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status = "disabled";
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interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-names = "irq_5";
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clocks = <&uartclk>;
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};
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uart1: uart@9c0a0000 {
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compatible = "arm,pl011";
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reg = <0x9c0a0000 0x1000>;
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status = "disabled";
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-names = "irq_6";
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clocks = <&uartclk>;
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};
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uart2: uart@9c0b0000 {
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compatible = "arm,pl011";
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reg = <0x9c0b0000 0x1000>;
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status = "disabled";
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-names = "irq_7";
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clocks = <&uartclk>;
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};
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uart3: uart@9c0c0000 {
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compatible = "arm,pl011";
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reg = <0x9c0c0000 0x1000>;
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status = "disabled";
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-names = "irq_8";
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clocks = <&uartclk>;
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};
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};
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};
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