zephyr/soc
Alexey Brodkin 408433d5c7 board/nsim: Add support of multi-core ARC HS platform in nSIM
Now when SMP support for ARC is available we may introduce a simulation
platform which might be used for testing & development for SMP setups.

One important note is stand-alone nSIM (as well as its "Free" flavour)
doesn't support SMP simulation so we have to switch to use of nSIM via
proprietary MetaWare debugger [1] and so:
 1. We introduce new emulation target "mdb"
 2. It's only possible to run that platform for those who
    have MetaWare tools installed and valid license.

Though QEMU port for ARC is in work at the moment and once we
open that port and it has SMP support we'll switch to it and everybody
will be able to try ARC HS with SMP.

[1] https://www.synopsys.com/dw/ipdir.php?ds=sw_metaware

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-08-11 21:18:38 +02:00
..
arc board/nsim: Add support of multi-core ARC HS platform in nSIM 2019-08-11 21:18:38 +02:00
arm soc: arm: xilinx_zynqmp: Add qemu based SoC 2019-08-09 22:50:50 +02:00
nios2 uart/ns16550, drivers/pcie: add PCI(e) support 2019-04-17 10:50:05 -07:00
posix docs: fix misspelling across the tree 2019-06-19 15:34:13 -05:00
riscv riscv: freedom: rename RISCV32 to RISCV 2019-08-08 00:29:24 -04:00
x86 x86: generate page tables at runtime 2019-08-07 12:50:53 -07:00
x86_64/x86_64 x86_64: minimally preparing for enabling newlib 2019-06-27 16:08:32 -04:00
xtensa drivers: spi_dw: Get clock frequency from DTS 2019-07-24 15:10:02 +02:00
Kconfig riscv32: rename to riscv 2019-08-02 13:54:48 -07:00