120 lines
2.2 KiB
Plaintext
120 lines
2.2 KiB
Plaintext
/*
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* Copyright (c) 2017 Justin Watson
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4";
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reg = <0>;
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};
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};
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sram0: memory@20100000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x20100000 0x20000>;
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};
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flash0: flash@400000 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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reg = <0x00400000 0x100000>;
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};
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soc {
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i2c0: i2c@40018000 {
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compatible = "atmel,sam-i2c-twi";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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reg = <0x40018000 0x128>;
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interrupts = <19 0>;
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peripheral-id = <19>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@4001C000 {
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compatible = "atmel,sam-i2c-twi";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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reg = <0x4001C000 0x128>;
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interrupts = <20 0>;
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peripheral-id = <20>;
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label = "I2C_1";
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status = "disabled";
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};
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uart0: uart@400E0600 {
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compatible = "atmel,sam-uart";
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reg = <0x400E0600 0x200>;
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interrupts = <8 1>;
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peripheral-id = <8>;
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status = "disabled";
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label = "UART_0";
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};
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uart1: uart@400E0800 {
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compatible = "atmel,sam-uart";
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reg = <0x400E0800 0x200>;
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interrupts = <9 1>;
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peripheral-id = <9>;
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status = "disabled";
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label = "UART_1";
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};
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usart0: usart@40024000 {
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compatible = "atmel,sam-usart";
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reg = <0x40024000 0x130>;
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interrupts = <14 1>;
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peripheral-id = <14>;
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status = "disabled";
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label = "USART_0";
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};
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usart1: usart@40028000 {
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compatible = "atmel,sam-usart";
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reg = <0x40028000 0x130>;
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interrupts = <15 1>;
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peripheral-id = <15>;
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status = "disabled";
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label = "USART_1";
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};
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porta: gpio@400E0E00 {
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compatible = "atmel,sam-gpio";
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reg = <0x400E0E00 0x190>;
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interrupts = <11 1>;
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peripheral-id = <11>;
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label = "PORTA";
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};
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portb: gpio@400E1000 {
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compatible = "atmel,sam-gpio";
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reg = <0x400E1000 0x190>;
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interrupts = <12 1>;
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peripheral-id = <12>;
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label = "PORTB";
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};
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portc: gpio@400E1200 {
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compatible = "atmel,sam-gpio";
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reg = <0x400E1200 0x190>;
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interrupts = <13 1>;
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peripheral-id = <13>;
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label = "PORTC";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <4>;
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};
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