Sylvio Alves b19c164e7b soc: espressif: add common linker tls entry ... Adds common thread-local-storage.ld provided by Zephyr. This also fixes a wrong xtensa_core entry that should be riscv_core. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>		2024-01-08 15:09:48 +01:00
..
dc233c	xtensa: dc233c: force invalidating TLBs during page table swap	2023-12-27 15:59:05 +00:00
espressif_esp32	soc: espressif: add common linker tls entry	2024-01-08 15:09:48 +01:00
intel_adsp	intel_adsp: ipc: pm action in busy state	2024-01-06 14:17:15 +01:00
nxp_adsp	xtensa: rename z_xtensa_irq to simple xtensa_irq	2023-12-13 09:41:24 +01:00
sample_controller	cmake: cleanup and simplify the standard include logic in Zephyr	2023-11-06 18:57:30 -05:00
CMakeLists.txt	…