66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/*
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* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <kernel_structs.h>
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#include <inttypes.h>
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#include <logging/log.h>
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LOG_MODULE_DECLARE(os);
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FUNC_NORETURN void z_riscv_fatal_error(unsigned int reason,
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const z_arch_esf_t *esf)
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{
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if (esf != NULL) {
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LOG_ERR("Faulting instruction address = 0x%08lx",
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esf->mepc);
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LOG_ERR(" ra: 0x%08lx gp: 0x%08lx tp: 0x%08lx t0: 0x%08lx",
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esf->ra, esf->gp, esf->tp, esf->t0);
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LOG_ERR(" t1: 0x%08lx t2: 0x%08lx t3: 0x%08lx t4: 0x%08lx",
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esf->t1, esf->t2, esf->t3, esf->t4);
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LOG_ERR(" t5: 0x%08lx t6: 0x%08lx a0: 0x%08lx a1: 0x%08lx",
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esf->t5, esf->t6, esf->a0, esf->a1);
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LOG_ERR(" a2: 0x%08lx a3: 0x%08lx a4: 0x%08lx a5: 0x%08lx",
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esf->a2, esf->a3, esf->a4, esf->a5);
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LOG_ERR(" a6: 0x%08lx a7: 0x%08lx\n",
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esf->a6, esf->a7);
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}
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z_fatal_error(reason, esf);
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CODE_UNREACHABLE;
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}
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static char *cause_str(ulong_t cause)
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{
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switch (cause) {
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case 0:
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return "Instruction address misaligned";
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case 1:
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return "Instruction Access fault";
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case 2:
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return "Illegal instruction";
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case 3:
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return "Breakpoint";
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case 4:
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return "Load address misaligned";
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case 5:
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return "Load access fault";
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default:
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return "unknown";
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}
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}
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FUNC_NORETURN void _Fault(const z_arch_esf_t *esf)
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{
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ulong_t mcause;
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__asm__ volatile("csrr %0, mcause" : "=r" (mcause));
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mcause &= SOC_MCAUSE_EXP_MASK;
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LOG_ERR("Exception cause %s (%ld)", cause_str(mcause), mcause);
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z_riscv_fatal_error(K_ERR_CPU_EXCEPTION, esf);
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}
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