zephyr/boards/espressif/esp32_ethernet_kit
Lucas Tamborrino e282b0ea84 soc: esp32xx: refactor clock and RTC subsystems
The RTC subsystem in espressif's SOCs, among other tasks
is responsible for clock selection for CPU and for low
power domain clocks such as RTC_SLOW and RTC_FAST.

This commit allows for proper clock source and rate
selection for CPU, using the espressif,riscv and
espressif,xtensa-lx6/7 bindings.

It also enables clock selection for RTC_FAST and RTC_SLOW,
that impacts some peripherals, such as rtc_timer.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2024-05-27 01:37:18 -07:00
..
doc
support
CMakeLists.txt
Kconfig.defconfig
Kconfig.esp32_ethernet_kit
Kconfig.sysbuild
board.cmake
board.yml
board_init.c
esp32_ethernet_kit-pinctrl.dtsi
esp32_ethernet_kit_appcpu.dts soc: esp32xx: refactor clock and RTC subsystems 2024-05-27 01:37:18 -07:00
esp32_ethernet_kit_appcpu.yaml
esp32_ethernet_kit_appcpu_defconfig
esp32_ethernet_kit_procpu.dts soc: esp32xx: refactor clock and RTC subsystems 2024-05-27 01:37:18 -07:00
esp32_ethernet_kit_procpu.yaml
esp32_ethernet_kit_procpu_defconfig