248 lines
7.6 KiB
C
248 lines
7.6 KiB
C
/* Freescale K20 microprocessor UART register definitions */
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/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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DESCRIPTION
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This module defines the UART Registers for the K20 Family of microprocessors
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*/
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#ifndef _K20UART_H_
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#define _K20UART_H_
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#include <stdint.h>
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#include <misc/__assert.h>
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typedef union {
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uint8_t value;
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struct {
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uint8_t sbr : 5 __packed; /* Hi Baud Rate Bits */
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uint8_t res_5 : 1 __packed;
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uint8_t rxEdgeIntEn : 1 __packed; /* RxD Active Edge */
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uint8_t lbkdIntEn : 1 __packed; /* LIN Break Detect */
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} field;
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} BDH_t; /* 0x000 BaudRate High */
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typedef union {
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uint8_t value;
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struct {
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uint8_t oddParity : 1 __packed;
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uint8_t parityEnable : 1 __packed;
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uint8_t idleLineType : 1 __packed;
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uint8_t rxWakepMethod : 1 __packed;
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uint8_t mode9Bit : 1 __packed;
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uint8_t remoteLoopback : 1 __packed;
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uint8_t uartStopWait : 1 __packed;
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uint8_t loopbackEn : 1 __packed;
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} field;
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} C1_t; /* 0x002 Control 1 */
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#define RX_EN_MASK 0x04
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#define TX_EN_MASK 0x08
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typedef union {
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uint8_t value;
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struct {
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uint8_t sendBreak : 1 __packed;
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uint8_t rxWakeupCtrl : 1 __packed;
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uint8_t rxEnable : 1 __packed;
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uint8_t txEnable : 1 __packed;
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uint8_t idleLineIntEn : 1 __packed;
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uint8_t rxFullInt_dmaTx_en : 1 __packed;
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uint8_t txCompleteIntEn : 1 __packed;
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uint8_t txInt_DmaTx_en : 1 __packed;
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} field;
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} C2_t; /* 0x003 Control 2 */
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typedef union {
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uint8_t value;
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struct {
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uint8_t parityErrIntEn : 1 __packed;
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uint8_t frameErrIntEn : 1 __packed;
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uint8_t noiseErrIntEn : 1 __packed;
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uint8_t overrunErrIntEn : 1 __packed;
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uint8_t txDataInvert : 1 __packed;
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uint8_t txDataPinOuttDir : 1 __packed;
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uint8_t txBit8 : 1 __packed;
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uint8_t rxBit8 : 1 __packed;
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} field;
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} C3_t; /* 0x006 Control 3 */
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typedef union {
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uint8_t value;
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struct {
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uint8_t brfa : 5 __packed; /* BaudRateFineAdjust*/
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uint8_t mode10Bit : 1 __packed;
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uint8_t matechAddrMode1En : 1 __packed;
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uint8_t matchAddrMode2En : 1 __packed;
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} field;
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} C4_t; /* 0x00A Control 4 */
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#define TX_DATA_EMPTY_MASK 0x80
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#define RX_DATA_FULL_MASK 0x20
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typedef union {
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uint8_t value;
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struct {
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uint8_t parityErr : 1 __packed;
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uint8_t framingErr : 1 __packed;
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uint8_t noice : 1 __packed;
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uint8_t rxOverrun : 1 __packed;
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uint8_t idleLine : 1 __packed;
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uint8_t rxDataFull : 1 __packed;
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uint8_t txComplete : 1 __packed;
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uint8_t txDataEmpty : 1 __packed;
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} field;
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} S1_t; /* 0x004 Status 1 */
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typedef union {
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uint8_t value;
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struct e {
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uint8_t rxActive : 1 __packed;
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uint8_t linBkDetectEn : 1 __packed;
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uint8_t brkCharLen13 : 1 __packed;
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uint8_t rxWakeupIdleDetect : 1 __packed;
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uint8_t rxDataInverted : 1 __packed;
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uint8_t msbFirst : 1 __packed;
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uint8_t rxedgif : 1 __packed;
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uint8_t lbkdif : 1 __packed;
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} field;
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} S2_t; /* 0x005 Status 2 */
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#define FIFO_SIZE_1 0
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#define FIFO_SIZE_4 1
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#define FIFO_SIZE_8 2
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#define FIFO_SIZE_16 3
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#define FIFO_SIZE_32 4
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#define FIFO_SIZE_64 5
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#define FIFO_SIZE_128 6
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#define FIFO_SIZE_RES 6 /* Reserved size */
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#define RX_FIFO_EN_MASK 0x08
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#define TX_FIFO_EN_MASK 0x80
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typedef union {
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uint8_t value;
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struct {
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uint8_t rxFifoSize : 3 __packed; /* read-only */
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uint8_t rxFifoEn : 1 __packed;
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uint8_t txFifoSize : 3 __packed; /* read-only */
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uint8_t txFifoEn : 1 __packed;
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} field;
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} PFIFO_t; /* 0x010 Fifo Parameter 1 */
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#define RX_FIFO_FLUSH_MASK 0x40
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#define TX_FIFO_FLUSH_MASK 0x80
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typedef union {
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uint8_t value;
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struct {
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uint8_t rxFifoUnderflowIntEn : 1 __packed;
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uint8_t txFifoOverflowIntEn : 1 __packed;
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uint8_t rxFifoOverflowIntEn : 1 __packed;
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uint8_t res_3 : 3 __packed;
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uint8_t rxFifoFlush : 1 __packed; /* write-only */
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uint8_t txFifoFlush : 1 __packed; /* write-only */
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} field;
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} CFIFO_t; /* 0x011 Fifo Control */
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typedef volatile struct {
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BDH_t bdh; /* 0x000 Baud Rate High */
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uint8_t bdl; /* 0x001 Baud Rate Low (04)*/
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C1_t c1; /* 0x002 Control 1 */
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C2_t c2; /* 0x003 Control 2 */
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S1_t s1; /* 0x004 Status 1 (C0) RO*/
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S2_t s2; /* 0x005 Status 2 */
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C3_t c3; /* 0x006 Control 3 */
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uint8_t d; /* 0x007 Data */
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uint8_t ma1; /* 0x008 Match Address 1 */
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uint8_t ma2; /* 0x009 Match Address 1 */
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C4_t c4; /* 0x00A Control 4 */
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uint8_t c5; /* 0x00B Control 5 */
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uint8_t ed; /* 0x00C Extended Data */
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uint8_t modem; /* 0x00D Modem */
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uint8_t ir; /* 0x00E Infrared */
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uint8_t zReserved00f; /* 0x00F */
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PFIFO_t pfifo; /* 0x010 FIFO Param */
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CFIFO_t cfifo; /* 0x011 FIFO Control */
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uint8_t sfifo; /* 0x012 FIFO Status (C0)*/
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uint8_t twfifo; /* 0x013 FIFO Tx Watermark */
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uint8_t tcfifo; /* 0x014 FIFO Tx Count */
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uint8_t rwfifo; /* 0x015 FIFO Rx Watermark (01)*/
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uint8_t rcfifo; /* 0x016 FIFO Rx Count */
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uint8_t u_7816[0x20 - 0x17]; /* 0x017-0x1F UART ISO-7816 standard */
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uint8_t u_cea709_1[0x32 - 0x20]; /* 0x020-0x31 UART CEA8709.1 standard
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*/
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uint8_t zReservStatused038_03c[0x1000 - 0x32]; /* 0x032-0xFFF Reserved
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*/
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} K20_UART_t; /* K20 Microntroller UART module */
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static ALWAYS_INLINE void _k20UartBaudRateSet(K20_UART_t *uart_p,
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uint32_t clkFreq,
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uint32_t baudRate)
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{
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/*
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* The baud rate is calculated as:
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* baudRate = clkFreq/(16*(SBR[12:0]+BRFA[5:0]/32)), where
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* - SBR is the combined UART Baud Rate Register settings and
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* - BRFA is the UART Baud Rate Fine Adjustment setting
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* This is equivalent to:
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* 32xSBR + BRFA = 2 * clkFreq/baudRate
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*/
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uint32_t clkBr = 2 * clkFreq / baudRate;
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uint16_t sbr = clkBr >> 5;
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uint8_t brfa = clkBr - (sbr << 5);
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__ASSERT((sbr && 0x1FFF), "clkFreq is too high or baudRate is too low");
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/* Note there are other fields (interrupts flag) in BDH register */
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uart_p->bdh.field.sbr = (uint8_t)(sbr >> 8);
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uart_p->bdl = (uint8_t)(sbr & 0xFF);
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uart_p->c4.field.brfa = brfa;
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}
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static inline void _k20UartFifoEnable(K20_UART_t *uart_p)
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{
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uint8_t tx_rx_state = uart_p->c2.value && (TX_EN_MASK | RX_EN_MASK);
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/* disable Rx and Tx */
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uart_p->c2.value &= !(TX_EN_MASK | RX_EN_MASK);
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uart_p->pfifo.value |= (TX_FIFO_EN_MASK | RX_FIFO_EN_MASK);
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uart_p->cfifo.value |= (TX_FIFO_FLUSH_MASK | RX_FIFO_FLUSH_MASK);
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/* restore Rx and Tx */
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uart_p->c2.value |= tx_rx_state;
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}
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#endif /* _K20UART_H_ */
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