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Besides adding ARCH_HAS_CODE_DATA_RELOCATION, this patch also adds support for the "sample_controller" SoC (used by qemu_xtensa) as demonstration. As Xtensa lacks a common linker script at the arch level, enabling it for each platform will be a piecemeal effort. This patch adds it to the `soc/xtensa/sample_controller` SoC. Basically, default RAMABLE_REGION is set to be called "RAM", and hooks are inserted so that gen_relocate_app.py can add the relevant linker bits. Also, `tests/application_developent/code_relocation` was tweaked to support the qemu_xtensa platform. Basically, add the relevant linker script and ensure that relevant memory regions have their program header (PHDR) associated. Signed-off-by: Ederson de Souza <ederson.desouza@intel.com> |
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src | ||
CMakeLists.txt | ||
Kconfig | ||
README.rst | ||
custom-sections.ld | ||
linker_arm_sram2.ld | ||
linker_riscv_qemu_sram2.ld | ||
linker_xtensa_qemu_sram2.ld | ||
prj.conf | ||
prj_riscv.conf | ||
prj_xtensa.conf | ||
testcase.yaml |
README.rst
.. _code_relocation: Code relocation ################# Overview ******** A simple example that demonstrates how relocation of code, data or bss sections using a custom linker script.