zephyr/dts/riscv/ite
Peter Marheine d4549ed808 it8xxx2: generalize ILM support
Executing code out of RAM on IT8xxx2 requires that the relevant
addresses be mapped onto the CPU's instruction memory bus, referred to
by ITE documentation as Instruction Local Memory (ILM). ILM mappings
configure blocks of RAM to be used for accesses to chosen addresses when
performing instruction fetch, instead of the memory that would normally
be accessed at that address.

ILM must be used for some chip features (particularly Flash
self-programming, to execute from RAM while writing to Flash), and has
historically been configured in the Flash driver. The RAM for that was
hard-coded as a single 4k block in the linker script.  Configuring ILM
in the flash driver is confusing because it is used by other SoC code as
well, currently in code that cannot depend on the Flash being functional
or in hand-selected functions that seem performance-critical.

This change moves ILM configuration to a new driver and dynamically
allocates RAM to ILM in the linker script, allowing software use of the
entire 64k RAM depending on configuration.  This makes ILM configuration
more discoverable and makes it much easier to correctly support the
CODE_DATA_RELOCATION feature on this SoC.

Signed-off-by: Peter Marheine <pmarheine@chromium.org>
2022-10-21 20:31:47 +02:00
..
it8xxx2-pinctrl-map.dtsi drivers: pinctrl: it8xxx2: update include paths 2022-05-09 12:45:29 -04:00
it8xxx2-wuc-map.dtsi
it8xxx2.dtsi it8xxx2: generalize ILM support 2022-10-21 20:31:47 +02:00