216 lines
5.9 KiB
YAML
216 lines
5.9 KiB
YAML
# Copyright (c) 2020 Gerson Fernando Budke <nandojve@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Atmel SAM4L Family I2C (TWIM) node
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The Atmel Two-wire Master Interface (TWIM) interconnects components on a
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unique two-wire bus, made up of one clock line and one data line with speeds
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of up to 3.4 Mbit/s, based on a byte-oriented transfer format. The TWIM is
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always a bus master and can transfer sequential or single bytes. Multiple
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master capability is supported. Arbitration of the bus is performed
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internally and relinquishes the bus automatically if the bus arbitration is
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lost.
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When using speeds above standard mode, user may need adjust clock and data
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lines slew and strength parameters. In general, slew 0 and minimal strength
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is enougth for short buses and light loads. As reference, the below
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is the lowest power configuration:
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std-clk-slew-lim = <0>;
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std-clk-strength-low = "0.5";
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std-data-slew-lim = <0>;
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std-data-strength-low = "0.5";
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hs-clk-slew-lim = <0>;
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hs-clk-strength-high = "0.5";
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hs-clk-strength-low = "0.5";
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hs-data-slew-lim = <0>;
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hs-data-strength-low = "0.5";
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For best performances, user can tune the slope curves using an osciloscope.
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The tuning should be performed by groups defined <mode>-<line>. The prefix
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std-<line> configures fast/fast-plus mode speeds and hs-<line> selects the
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high speed mode. The tune should be performed for both clock and data lines
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on both speed modes.
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compatible: "atmel,sam-i2c-twim"
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include: i2c-controller.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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peripheral-id:
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type: int
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required: true
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description: peripheral ID
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std-clk-slew-lim:
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type: int
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required: true
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description: |
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Slew limit of the TWCK output buffer. This should be adjusted with
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std-clk-strength-low to fine tune the TWCK slope.
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enum:
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- 0
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- 1
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- 2
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- 3
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std-clk-strength-low:
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type: string
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required: true
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description: |
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Pull-down drive strength of the TWCK output buffer in fast/fast plus
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mode. This should be adjusted to provide proper TWCK line fall time.
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The value represents the port output current in mA when signal on
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low level.
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enum:
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- "0.5"
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- "1.0"
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- "1.6"
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- "3.1"
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- "6.2"
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- "9.3"
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- "15.5"
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- "21.8"
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std-data-slew-lim:
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type: int
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required: true
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description: |
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Slew limit of the TWD output buffer. This should be adjusted with
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std-data-strength-low to fine tune the TWD slope.
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enum:
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- 0
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- 1
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- 2
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- 3
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std-data-strength-low:
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type: string
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required: true
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description: |
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Pull-down drive strength of the TWD output buffer in fast/fast plus
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mode. This should be adjusted to provide proper TWD line fall time.
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The value represents the port output current in mA when signal on
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low level.
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enum:
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- "0.5"
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- "1.0"
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- "1.6"
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- "3.1"
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- "6.2"
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- "9.3"
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- "15.5"
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- "21.8"
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hs-clk-slew-lim:
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type: int
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required: true
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description: |
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Slew limit of the TWCK output buffer in high speed mode. This
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should be adjusted with both hs-clk-strength-high and
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hs-clk-strength-low to fine tune the TWCK slope.
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enum:
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- 0
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- 1
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- 2
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- 3
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hs-clk-strength-high:
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type: string
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required: true
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description: |
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Pull-up drive strength of the TWCK output buffer in high speed
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mode. This should be adjusted to provide proper TWCK line rise time.
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The value represents the port output current in mA when signal on
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high level.
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enum:
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- "0.5"
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- "1.0"
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- "1.5"
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- "3.0"
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hs-clk-strength-low:
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type: string
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required: true
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description: |
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Pull-down drive strength of the TWCK output buffer in high speed
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mode. This should be adjusted to provide proper TWCK line fall time.
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The value represents the port output current in mA when signal on
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low level.
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enum:
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- "0.5"
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- "1.0"
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- "1.6"
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- "3.1"
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- "6.2"
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- "9.3"
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- "15.5"
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- "21.8"
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hs-data-slew-lim:
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type: int
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required: true
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description: |
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Slew limit of the TWD output buffer in high speed mode. This
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should be adjusted with hs-data-strength-low to fine tune the TWD
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slope.
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enum:
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- 0
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- 1
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- 2
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- 3
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hs-data-strength-low:
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type: string
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description: |
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Pull-down drive strength of the TWD output buffer in high speed
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mode. This should be adjusted to provide proper TWD line fall time.
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The value represents the port output current in mA when signal on
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low level.
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enum:
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- "0.5"
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- "1.0"
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- "1.6"
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- "3.1"
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- "6.2"
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- "9.3"
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- "15.5"
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- "21.8"
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hs-master-code:
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type: int
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required: true
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description: |
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3-bit code to be prefixed with 0b00001 to form a unique
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8-bit HS-mode master code (0000 1XXX)
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enum:
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- 0 # 000
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- 1 # 001
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- 2 # 010
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- 3 # 011
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- 4 # 100
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- 5 # 101
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- 6 # 110
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- 7 # 111
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pinctrl-0:
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type: phandles
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required: true
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description: |
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GPIO pin configuration for TWCK & TWD signals. We expect that
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the phandles will reference pinctrl nodes. These nodes will
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have a nodelabel that matches the Atmel SoC HAL defines and
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be of the form p<port><pin><periph>_<inst>_<signal>.
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For example the I2C on SAM4L would be
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pinctrl-0 = <&pb0a_twi1_twd1 &pb1a_twi1_twck1>;
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