cbaafe209c
The nRF54 and nRF92 chips has data cache, which means the ICMsg and ICBMsg must be configured to follow required cache alignment of the shared memory. The `dcache-alignement` needs to be defined for that. Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no> |
||
|---|---|---|
| .. | ||
| _doxygen | ||
| _extensions/zephyr | ||
| _scripts | ||
| _static | ||
| _templates | ||
| build | ||
| connectivity | ||
| contribute | ||
| develop | ||
| hardware | ||
| images | ||
| introduction | ||
| kernel | ||
| project | ||
| releases | ||
| safety | ||
| security | ||
| services | ||
| templates | ||
| 404.rst | ||
| CMakeLists.txt | ||
| LICENSING.rst | ||
| Makefile | ||
| conf.py | ||
| glossary.rst | ||
| index-tex.rst | ||
| index.rst | ||
| kconfig.rst | ||
| requirements.txt | ||
| substitutions.txt | ||
| zephyr.doxyfile.in | ||