199 lines
4.2 KiB
Plaintext
199 lines
4.2 KiB
Plaintext
/*
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* Copyright 2022 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_lpc55S36_ns.dtsi>
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#include "lpcxpresso55s36-pinctrl.dtsi"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "NXP LPCXpresso55S36 board";
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compatible = "nxp,lpc55xxx", "nxp,lpc";
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chosen {
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,code-partition = &slot0_partition;
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zephyr,console = &flexcomm0;
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zephyr,shell-uart = &flexcomm0;
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zephyr,canbus = &can0;
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zephyr,flash-controller = &iap;
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};
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aliases{
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led0 = &red_led;
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led1 = &green_led;
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led2 = &blue_led;
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sw0 = &btn_wk;
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sw1 = &btn_usr;
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usart-0 = &flexcomm0;
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pwm-0 = &flexpwm1_pwm0;
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};
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leds {
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compatible = "gpio-leds";
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red_led: led_0 {
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gpios = <&gpio1 28 0>;
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label = "Red LED";
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};
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green_led: led_1 {
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gpios = <&gpio0 22 0>;
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label = "Green LED";
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};
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blue_led: led_2 {
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gpios = <&gpio1 11 0>;
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label = "Blue LED";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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btn_wk: button_0 {
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label = "Wakeup button";
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gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
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zephyr,code = <INPUT_KEY_WAKEUP>;
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};
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btn_usr: button_1 {
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label = "USR button";
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gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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mikrobus_header: mikrobus-connector {
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compatible = "mikro-bus";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <0 0 &gpio1 9 0>, /* AN */
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/* Not a GPIO*/ /* RST */
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<2 0 &gpio0 20 0>, /* CS */
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<3 0 &gpio1 2 0>, /* SCK */
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<4 0 &gpio1 3 0>, /* MISO */
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<5 0 &gpio0 26 0>, /* MOSI */
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/* +3.3V */
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/* GND */
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<6 0 &gpio1 8 0>, /* PWM */
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<7 0 &gpio0 17 0>, /* INT */
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<8 0 &gpio1 24 0>, /* RX */
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<9 0 &gpio1 25 0>, /* TX */
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<10 0 &gpio1 30 0>, /* SCL */
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<11 0 &gpio1 21 0>; /* SDA */
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/* +5V */
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/* GND */
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};
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arduino_header: arduino-connector {
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compatible = "arduino-header-r3";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <0 0 &gpio0 15 0>, /* A0 */
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<1 0 &gpio0 16 0>, /* A1 */
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<2 0 &gpio0 0 0>, /* A2 */
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<3 0 &gpio1 13 0>, /* A3 */
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<4 0 &gpio1 21 0>, /* A4 */
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<5 0 &gpio1 30 0>, /* A5 */
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<6 0 &gpio2 0 0>, /* D0 */
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<7 0 &gpio2 1 0>, /* D1 */
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<8 0 &gpio1 26 0>, /* D2 */
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<9 0 &gpio1 23 0>, /* D3 */
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<10 0 &gpio1 8 0>, /* D4 */
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<11 0 &gpio1 25 0>, /* D5 */
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<12 0 &gpio1 0 0>, /* D6 */
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<13 0 &gpio1 28 0>, /* D7 */
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<14 0 &gpio1 27 0>, /* D8 */
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<15 0 &gpio1 29 0>, /* D9 */
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<16 0 &gpio1 26 0>, /* D10 */
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<17 0 &gpio0 26 0>, /* D11 */
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<18 0 &gpio1 3 0>, /* D12 */
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<19 0 &gpio1 2 0>, /* D13 */
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<20 0 &gpio0 3 0>, /* D14 */
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<21 0 &gpio0 2 0>; /* D15 */
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};
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};
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&flexcomm0 {
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status = "okay";
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compatible = "nxp,lpc-usart";
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current-speed = <115200>;
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pinctrl-0 = <&pinmux_flexcomm0_usart>;
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pinctrl-names = "default";
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};
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&can0 {
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pinctrl-0 = <&pinmux_mcan_can0>;
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pinctrl-names = "default";
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status = "okay";
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can-transceiver {
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max-bitrate = <5000000>;
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};
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};
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&adc0 {
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status = "okay";
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pinctrl-0 = <&pinmux_lpadc0>;
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pinctrl-names = "default";
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};
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/* Flash is divided into 32 kB sub-regions.
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* Each sub-region can be assigned individual
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* security tier in secure AHB controller.
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*/
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&flash0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x0 DT_SIZE_K(32)>;
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};
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slot0_partition: partition@8000 {
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label = "image-0";
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reg = <0x00008000 DT_SIZE_K(96)>;
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};
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slot1_partition: partition@20000 {
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label = "image-1";
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reg = <0x00020000 DT_SIZE_K(96)>;
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};
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storage_partition: partition@38000 {
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label = "storage";
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reg = <0x00038000 DT_SIZE_K(20)>;
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};
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/* The last 12KB are reserved for PFR on the 256KB flash.
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*/
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};
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};
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&flexpwm1_pwm0 {
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status = "okay";
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pinctrl-0 = <&pinmux_flexpwm1_pwm0>;
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pinctrl-names = "default";
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};
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zephyr_udc0: &usbfs {
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status = "okay";
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pinctrl-0 = <&pinmux_usbfs>;
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pinctrl-names = "default";
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};
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&dma0 {
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status = "okay";
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};
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&vref0 {
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status = "okay";
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};
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&dac0 {
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status = "okay";
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pinctrl-0 = <&pinmux_dac0>;
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pinctrl-names = "default";
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};
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