zephyr/arch/xtensa/core/irq_manage.c

52 lines
1.5 KiB
C

/*
* Copyright (c) 2016 Cadence Design Systems, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/types.h>
#include <stdio.h>
#include <xtensa_api.h>
#include <kernel_arch_data.h>
#include <misc/__assert.h>
/*
* @internal
*
* @brief Set an interrupt's priority
*
* The priority is verified if ASSERT_ON is enabled.
*
* The priority is verified if ASSERT_ON is enabled. The maximum number of
* priority levels is a little complex, as there are some hardware priority
* levels which are reserved: three for various types of exceptions, and
* possibly one additional to support zero latency interrupts.
*
* Valid values are from 1 to 6. Interrupts of priority 1 are not masked when
* interrupts are locked system-wide, so care must be taken when using them.
* ISR installed with priority 0 interrupts cannot make kernel calls.
*
* @return N/A
*/
void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
{
__ASSERT(prio < XCHAL_EXCM_LEVEL + 1,
"invalid priority %d! values must be less than %d\n",
prio, XCHAL_EXCM_LEVEL + 1);
/* TODO: Write code to set priority if this is ever possible on
* Xtensa
*/
}
#ifdef CONFIG_DYNAMIC_INTERRUPTS
int z_arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
void (*routine)(void *parameter), void *parameter,
u32_t flags)
{
ARG_UNUSED(flags);
ARG_UNUSED(priority);
z_isr_install(irq, routine, parameter);
return irq;
}
#endif /* CONFIG_DYNAMIC_INTERRUPTS */