651 lines
17 KiB
C
651 lines
17 KiB
C
/* MCUX Ethernet Driver
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*
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* Copyright (c) 2016-2017 ARM Ltd
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* Copyright (c) 2016 Linaro Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Driver Limitations:
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*
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* There is no statistics collection for either normal operation or
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* error behaviour.
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*/
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#define SYS_LOG_DOMAIN "dev/eth_mcux"
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#define SYS_LOG_LEVEL SYS_LOG_LEVEL_DEBUG
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#include <logging/sys_log.h>
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#include <board.h>
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#include <device.h>
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#include <misc/util.h>
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#include <kernel.h>
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#include <net/net_pkt.h>
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#include <net/net_if.h>
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#include "fsl_enet.h"
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#include "fsl_phy.h"
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#include "fsl_port.h"
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enum eth_mcux_phy_state {
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eth_mcux_phy_state_initial,
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eth_mcux_phy_state_reset,
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eth_mcux_phy_state_autoneg,
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eth_mcux_phy_state_restart,
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eth_mcux_phy_state_read_status,
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eth_mcux_phy_state_read_duplex,
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eth_mcux_phy_state_wait,
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eth_mcux_phy_state_closing
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};
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static const char *
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phy_state_name(enum eth_mcux_phy_state state) __attribute__((unused));
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static const char *phy_state_name(enum eth_mcux_phy_state state)
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{
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static const char * const name[] = {
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"initial",
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"reset",
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"autoneg",
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"restart",
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"read-status",
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"read-duplex",
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"wait",
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"closing"
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};
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return name[state];
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}
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struct eth_context {
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struct net_if *iface;
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enet_handle_t enet_handle;
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struct k_sem tx_buf_sem;
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enum eth_mcux_phy_state phy_state;
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bool enabled;
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bool link_up;
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phy_duplex_t phy_duplex;
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phy_speed_t phy_speed;
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u8_t mac_addr[6];
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struct k_work phy_work;
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struct k_delayed_work delayed_phy_work;
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/* TODO: FIXME. This Ethernet frame sized buffer is used for
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* interfacing with MCUX. How it works is that hardware uses
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* DMA scatter buffers to receive a frame, and then public
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* MCUX call gathers them into this buffer (there's no other
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* public interface). All this happens only for this driver
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* to scatter this buffer again into Zephyr fragment buffers.
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* This is not efficient, but proper resolution of this issue
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* depends on introduction of zero-copy networking support
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* in Zephyr, and adding needed interface to MCUX (or
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* bypassing it and writing a more complex driver working
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* directly with hardware).
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*/
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u8_t frame_buf[1500];
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};
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static void eth_0_config_func(void);
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static enet_rx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
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rx_buffer_desc[CONFIG_ETH_MCUX_TX_BUFFERS];
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static enet_tx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
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tx_buffer_desc[CONFIG_ETH_MCUX_TX_BUFFERS];
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/* Use ENET_FRAME_MAX_VALNFRAMELEN for VLAN frame size
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* Use ENET_FRAME_MAX_FRAMELEN for ethernet frame size
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*/
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#define ETH_MCUX_BUFFER_SIZE \
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ROUND_UP(ENET_FRAME_MAX_FRAMELEN, ENET_BUFF_ALIGNMENT)
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static u8_t __aligned(ENET_BUFF_ALIGNMENT)
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rx_buffer[CONFIG_ETH_MCUX_RX_BUFFERS][ETH_MCUX_BUFFER_SIZE];
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static u8_t __aligned(ENET_BUFF_ALIGNMENT)
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tx_buffer[CONFIG_ETH_MCUX_TX_BUFFERS][ETH_MCUX_BUFFER_SIZE];
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static void eth_mcux_decode_duplex_and_speed(u32_t status,
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phy_duplex_t *p_phy_duplex,
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phy_speed_t *p_phy_speed)
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{
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switch (status & PHY_CTL1_SPEEDUPLX_MASK) {
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case PHY_CTL1_10FULLDUPLEX_MASK:
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*p_phy_duplex = kPHY_FullDuplex;
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*p_phy_speed = kPHY_Speed10M;
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break;
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case PHY_CTL1_100FULLDUPLEX_MASK:
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*p_phy_duplex = kPHY_FullDuplex;
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*p_phy_speed = kPHY_Speed100M;
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break;
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case PHY_CTL1_100HALFDUPLEX_MASK:
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*p_phy_duplex = kPHY_HalfDuplex;
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*p_phy_speed = kPHY_Speed100M;
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break;
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case PHY_CTL1_10HALFDUPLEX_MASK:
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*p_phy_duplex = kPHY_HalfDuplex;
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*p_phy_speed = kPHY_Speed10M;
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break;
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}
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}
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static void eth_mcux_phy_enter_reset(struct eth_context *context)
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{
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const u32_t phy_addr = 0;
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/* Reset the PHY. */
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ENET_StartSMIWrite(ENET, phy_addr, PHY_BASICCONTROL_REG,
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kENET_MiiWriteValidFrame,
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PHY_BCTL_RESET_MASK);
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context->phy_state = eth_mcux_phy_state_reset;
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}
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static void eth_mcux_phy_start(struct eth_context *context)
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{
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#ifdef CONFIG_ETH_MCUX_PHY_DETAILED_DEBUG
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SYS_LOG_DBG("phy_state=%s", phy_state_name(context->phy_state));
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#endif
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context->enabled = true;
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switch (context->phy_state) {
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case eth_mcux_phy_state_initial:
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ENET_ActiveRead(ENET);
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eth_mcux_phy_enter_reset(context);
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break;
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case eth_mcux_phy_state_reset:
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case eth_mcux_phy_state_autoneg:
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case eth_mcux_phy_state_restart:
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case eth_mcux_phy_state_read_status:
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case eth_mcux_phy_state_read_duplex:
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case eth_mcux_phy_state_wait:
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case eth_mcux_phy_state_closing:
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break;
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}
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}
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void eth_mcux_phy_stop(struct eth_context *context)
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{
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#ifdef CONFIG_ETH_MCUX_PHY_DETAILED_DEBUG
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SYS_LOG_DBG("phy_state=%s", phy_state_name(context->phy_state));
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#endif
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context->enabled = false;
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switch (context->phy_state) {
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case eth_mcux_phy_state_initial:
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case eth_mcux_phy_state_reset:
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case eth_mcux_phy_state_autoneg:
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case eth_mcux_phy_state_restart:
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case eth_mcux_phy_state_read_status:
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case eth_mcux_phy_state_read_duplex:
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/* Do nothing, let the current communication complete
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* then deal with shutdown.
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*/
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context->phy_state = eth_mcux_phy_state_closing;
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break;
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case eth_mcux_phy_state_wait:
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k_delayed_work_cancel(&context->delayed_phy_work);
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/* @todo, actually power downt he PHY ? */
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context->phy_state = eth_mcux_phy_state_initial;
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break;
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case eth_mcux_phy_state_closing:
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/* We are already going down. */
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break;
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}
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}
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static void eth_mcux_phy_event(struct eth_context *context)
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{
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u32_t status;
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bool link_up;
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phy_duplex_t phy_duplex = kPHY_FullDuplex;
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phy_speed_t phy_speed = kPHY_Speed100M;
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const u32_t phy_addr = 0;
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#ifdef CONFIG_ETH_MCUX_PHY_DETAILED_DEBUG
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SYS_LOG_DBG("phy_state=%s", phy_state_name(context->phy_state));
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#endif
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switch (context->phy_state) {
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case eth_mcux_phy_state_initial:
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break;
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case eth_mcux_phy_state_closing:
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if (context->enabled) {
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eth_mcux_phy_enter_reset(context);
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} else {
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/* @todo, actually power down the PHY ? */
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context->phy_state = eth_mcux_phy_state_initial;
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}
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break;
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case eth_mcux_phy_state_reset:
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/* Setup PHY autonegotiation. */
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ENET_StartSMIWrite(ENET, phy_addr, PHY_AUTONEG_ADVERTISE_REG,
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kENET_MiiWriteValidFrame,
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(PHY_100BASETX_FULLDUPLEX_MASK |
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PHY_100BASETX_HALFDUPLEX_MASK |
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PHY_10BASETX_FULLDUPLEX_MASK |
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PHY_10BASETX_HALFDUPLEX_MASK | 0x1U));
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context->phy_state = eth_mcux_phy_state_autoneg;
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break;
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case eth_mcux_phy_state_autoneg:
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/* Setup PHY autonegotiation. */
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ENET_StartSMIWrite(ENET, phy_addr, PHY_BASICCONTROL_REG,
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kENET_MiiWriteValidFrame,
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(PHY_BCTL_AUTONEG_MASK |
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PHY_BCTL_RESTART_AUTONEG_MASK));
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context->phy_state = eth_mcux_phy_state_restart;
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break;
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case eth_mcux_phy_state_wait:
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case eth_mcux_phy_state_restart:
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/* Start reading the PHY basic status. */
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ENET_StartSMIRead(ENET, phy_addr, PHY_BASICSTATUS_REG,
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kENET_MiiReadValidFrame);
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context->phy_state = eth_mcux_phy_state_read_status;
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break;
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case eth_mcux_phy_state_read_status:
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/* PHY Basic status is available. */
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status = ENET_ReadSMIData(ENET);
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link_up = status & PHY_BSTATUS_LINKSTATUS_MASK;
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if (link_up && !context->link_up) {
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/* Start reading the PHY control register. */
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ENET_StartSMIRead(ENET, phy_addr, PHY_CONTROL1_REG,
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kENET_MiiReadValidFrame);
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context->link_up = link_up;
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context->phy_state = eth_mcux_phy_state_read_duplex;
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} else if (!link_up && context->link_up) {
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SYS_LOG_INF("Link down");
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context->link_up = link_up;
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k_delayed_work_submit(&context->delayed_phy_work,
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CONFIG_ETH_MCUX_PHY_TICK_MS);
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context->phy_state = eth_mcux_phy_state_wait;
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} else {
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k_delayed_work_submit(&context->delayed_phy_work,
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CONFIG_ETH_MCUX_PHY_TICK_MS);
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context->phy_state = eth_mcux_phy_state_wait;
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}
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break;
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case eth_mcux_phy_state_read_duplex:
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/* PHY control register is available. */
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status = ENET_ReadSMIData(ENET);
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eth_mcux_decode_duplex_and_speed(status,
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&phy_duplex,
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&phy_speed);
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if (phy_speed != context->phy_speed ||
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phy_duplex != context->phy_duplex) {
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context->phy_speed = phy_speed;
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context->phy_duplex = phy_duplex;
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ENET_SetMII(ENET,
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(enet_mii_speed_t) phy_speed,
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(enet_mii_duplex_t) phy_duplex);
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}
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SYS_LOG_INF("Enabled %sM %s-duplex mode.",
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(phy_speed ? "100" : "10"),
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(phy_duplex ? "full" : "half"));
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k_delayed_work_submit(&context->delayed_phy_work,
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CONFIG_ETH_MCUX_PHY_TICK_MS);
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context->phy_state = eth_mcux_phy_state_wait;
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break;
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}
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}
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static void eth_mcux_phy_work(struct k_work *item)
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{
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struct eth_context *context =
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CONTAINER_OF(item, struct eth_context, phy_work);
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eth_mcux_phy_event(context);
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}
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static void eth_mcux_delayed_phy_work(struct k_work *item)
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{
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struct eth_context *context =
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CONTAINER_OF(item, struct eth_context, delayed_phy_work);
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eth_mcux_phy_event(context);
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}
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static int eth_tx(struct net_if *iface, struct net_pkt *pkt)
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{
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struct eth_context *context = iface->dev->driver_data;
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const struct net_buf *frag;
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u8_t *dst;
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status_t status;
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unsigned int imask;
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u16_t total_len = net_pkt_ll_reserve(pkt) + net_pkt_get_len(pkt);
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k_sem_take(&context->tx_buf_sem, K_FOREVER);
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/* As context->frame_buf is shared resource used by both eth_tx
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* and eth_rx, we need to protect it with irq_lock.
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*/
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imask = irq_lock();
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/* Gather fragment buffers into flat Ethernet frame buffer
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* which can be fed to MCUX Ethernet functions. First
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* fragment is special - it contains link layer (Ethernet
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* in our case) headers and must be treated specially.
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*/
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dst = context->frame_buf;
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memcpy(dst, net_pkt_ll(pkt),
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net_pkt_ll_reserve(pkt) + pkt->frags->len);
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dst += net_pkt_ll_reserve(pkt) + pkt->frags->len;
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/* Continue with the rest of fragments (which contain only data) */
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frag = pkt->frags->frags;
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while (frag) {
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memcpy(dst, frag->data, frag->len);
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dst += frag->len;
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frag = frag->frags;
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}
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status = ENET_SendFrame(ENET, &context->enet_handle, context->frame_buf,
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total_len);
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irq_unlock(imask);
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if (status) {
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SYS_LOG_ERR("ENET_SendFrame error: %d\n", status);
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return -1;
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}
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net_pkt_unref(pkt);
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return 0;
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}
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static void eth_rx(struct device *iface)
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{
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struct eth_context *context = iface->driver_data;
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struct net_buf *prev_buf;
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struct net_pkt *pkt;
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const u8_t *src;
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u32_t frame_length = 0;
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status_t status;
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unsigned int imask;
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status = ENET_GetRxFrameSize(&context->enet_handle, &frame_length);
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if (status) {
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enet_data_error_stats_t error_stats;
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SYS_LOG_ERR("ENET_GetRxFrameSize return: %d", status);
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ENET_GetRxErrBeforeReadFrame(&context->enet_handle,
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&error_stats);
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/* Flush the current read buffer. This operation can
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* only report failure if there is no frame to flush,
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* which cannot happen in this context.
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*/
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status = ENET_ReadFrame(ENET, &context->enet_handle, NULL, 0);
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assert(status == kStatus_Success);
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return;
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}
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pkt = net_pkt_get_reserve_rx(0, K_NO_WAIT);
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if (!pkt) {
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/* We failed to get a receive buffer. We don't add
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* any further logging here because the allocator
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* issued a diagnostic when it failed to allocate.
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*
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* Flush the current read buffer. This operation can
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* only report failure if there is no frame to flush,
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* which cannot happen in this context.
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*/
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status = ENET_ReadFrame(ENET, &context->enet_handle, NULL, 0);
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assert(status == kStatus_Success);
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return;
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}
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if (sizeof(context->frame_buf) < frame_length) {
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SYS_LOG_ERR("frame too large (%d)\n", frame_length);
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net_pkt_unref(pkt);
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status = ENET_ReadFrame(ENET, &context->enet_handle, NULL, 0);
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assert(status == kStatus_Success);
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return;
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}
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/* As context->frame_buf is shared resource used by both eth_tx
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* and eth_rx, we need to protect it with irq_lock.
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*/
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imask = irq_lock();
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status = ENET_ReadFrame(ENET, &context->enet_handle,
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context->frame_buf, frame_length);
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if (status) {
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irq_unlock(imask);
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SYS_LOG_ERR("ENET_ReadFrame failed: %d\n", status);
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net_pkt_unref(pkt);
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return;
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}
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src = context->frame_buf;
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prev_buf = NULL;
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do {
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struct net_buf *pkt_buf;
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size_t frag_len;
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pkt_buf = net_pkt_get_frag(pkt, K_NO_WAIT);
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if (!pkt_buf) {
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irq_unlock(imask);
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SYS_LOG_ERR("Failed to get fragment buf\n");
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net_pkt_unref(pkt);
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assert(status == kStatus_Success);
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return;
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}
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if (!prev_buf) {
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net_pkt_frag_insert(pkt, pkt_buf);
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} else {
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net_buf_frag_insert(prev_buf, pkt_buf);
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}
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prev_buf = pkt_buf;
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frag_len = net_buf_tailroom(pkt_buf);
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if (frag_len > frame_length) {
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frag_len = frame_length;
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}
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memcpy(pkt_buf->data, src, frag_len);
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net_buf_add(pkt_buf, frag_len);
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src += frag_len;
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frame_length -= frag_len;
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} while (frame_length > 0);
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irq_unlock(imask);
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if (net_recv_data(context->iface, pkt) < 0) {
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net_pkt_unref(pkt);
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}
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}
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static void eth_callback(ENET_Type *base, enet_handle_t *handle,
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enet_event_t event, void *param)
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{
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struct device *iface = param;
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struct eth_context *context = iface->driver_data;
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switch (event) {
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case kENET_RxEvent:
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eth_rx(iface);
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break;
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case kENET_TxEvent:
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/* Free the TX buffer. */
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k_sem_give(&context->tx_buf_sem);
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break;
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case kENET_ErrEvent:
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/* Error event: BABR/BABT/EBERR/LC/RL/UN/PLR. */
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break;
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case kENET_WakeUpEvent:
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/* Wake up from sleep mode event. */
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break;
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case kENET_TimeStampEvent:
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/* Time stamp event. */
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break;
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case kENET_TimeStampAvailEvent:
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/* Time stamp available event. */
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|
break;
|
|
}
|
|
}
|
|
|
|
#if defined(CONFIG_ETH_MCUX_0_RANDOM_MAC)
|
|
static void generate_mac(u8_t *mac_addr)
|
|
{
|
|
u32_t entropy;
|
|
|
|
entropy = sys_rand32_get();
|
|
|
|
mac_addr[3] = entropy >> 8;
|
|
mac_addr[4] = entropy >> 16;
|
|
/* Locally administered, unicast */
|
|
mac_addr[5] = ((entropy >> 0) & 0xfc) | 0x02;
|
|
}
|
|
#endif
|
|
|
|
static int eth_0_init(struct device *dev)
|
|
{
|
|
struct eth_context *context = dev->driver_data;
|
|
enet_config_t enet_config;
|
|
u32_t sys_clock;
|
|
enet_buffer_config_t buffer_config = {
|
|
.rxBdNumber = CONFIG_ETH_MCUX_RX_BUFFERS,
|
|
.txBdNumber = CONFIG_ETH_MCUX_TX_BUFFERS,
|
|
.rxBuffSizeAlign = ETH_MCUX_BUFFER_SIZE,
|
|
.txBuffSizeAlign = ETH_MCUX_BUFFER_SIZE,
|
|
.rxBdStartAddrAlign = rx_buffer_desc,
|
|
.txBdStartAddrAlign = tx_buffer_desc,
|
|
.rxBufferAlign = rx_buffer[0],
|
|
.txBufferAlign = tx_buffer[0],
|
|
};
|
|
|
|
k_sem_init(&context->tx_buf_sem,
|
|
CONFIG_ETH_MCUX_TX_BUFFERS, CONFIG_ETH_MCUX_TX_BUFFERS);
|
|
k_work_init(&context->phy_work, eth_mcux_phy_work);
|
|
k_delayed_work_init(&context->delayed_phy_work,
|
|
eth_mcux_delayed_phy_work);
|
|
|
|
sys_clock = CLOCK_GetFreq(kCLOCK_CoreSysClk);
|
|
|
|
ENET_GetDefaultConfig(&enet_config);
|
|
enet_config.interrupt |= kENET_RxFrameInterrupt;
|
|
enet_config.interrupt |= kENET_TxFrameInterrupt;
|
|
enet_config.interrupt |= kENET_MiiInterrupt;
|
|
|
|
#ifdef CONFIG_ETH_MCUX_PROMISCUOUS_MODE
|
|
/* FIXME: Workaround for lack of driver API support for multicast
|
|
* management. So, instead we want to receive all multicast
|
|
* frames "by default", or otherwise basic IPv6 features, like
|
|
* address resolution, don't work. On Kinetis Ethernet controller,
|
|
* that translates to enabling promiscuous mode. The real
|
|
* fix depends on https://jira.zephyrproject.org/browse/ZEP-1673.
|
|
*/
|
|
enet_config.macSpecialConfig |= kENET_ControlPromiscuousEnable;
|
|
#endif
|
|
|
|
#if defined(CONFIG_ETH_MCUX_0_RANDOM_MAC)
|
|
generate_mac(context->mac_addr);
|
|
#endif
|
|
|
|
ENET_Init(ENET,
|
|
&context->enet_handle,
|
|
&enet_config,
|
|
&buffer_config,
|
|
context->mac_addr,
|
|
sys_clock);
|
|
|
|
ENET_SetSMI(ENET, sys_clock, false);
|
|
|
|
SYS_LOG_DBG("MAC %02x:%02x:%02x:%02x:%02x:%02x",
|
|
context->mac_addr[0], context->mac_addr[1],
|
|
context->mac_addr[2], context->mac_addr[3],
|
|
context->mac_addr[4], context->mac_addr[5]);
|
|
|
|
ENET_SetCallback(&context->enet_handle, eth_callback, dev);
|
|
eth_0_config_func();
|
|
|
|
eth_mcux_phy_start(context);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void eth_0_iface_init(struct net_if *iface)
|
|
{
|
|
struct device *dev = net_if_get_device(iface);
|
|
struct eth_context *context = dev->driver_data;
|
|
|
|
net_if_set_link_addr(iface, context->mac_addr,
|
|
sizeof(context->mac_addr),
|
|
NET_LINK_ETHERNET);
|
|
context->iface = iface;
|
|
}
|
|
|
|
static struct net_if_api api_funcs_0 = {
|
|
.init = eth_0_iface_init,
|
|
.send = eth_tx,
|
|
};
|
|
|
|
static void eth_mcux_rx_isr(void *p)
|
|
{
|
|
struct device *dev = p;
|
|
struct eth_context *context = dev->driver_data;
|
|
|
|
ENET_ReceiveIRQHandler(ENET, &context->enet_handle);
|
|
}
|
|
|
|
static void eth_mcux_tx_isr(void *p)
|
|
{
|
|
struct device *dev = p;
|
|
struct eth_context *context = dev->driver_data;
|
|
|
|
ENET_TransmitIRQHandler(ENET, &context->enet_handle);
|
|
}
|
|
|
|
static void eth_mcux_error_isr(void *p)
|
|
{
|
|
struct device *dev = p;
|
|
struct eth_context *context = dev->driver_data;
|
|
u32_t pending = ENET_GetInterruptStatus(ENET);
|
|
|
|
if (pending & ENET_EIR_MII_MASK) {
|
|
k_work_submit(&context->phy_work);
|
|
ENET_ClearInterruptStatus(ENET, kENET_MiiInterrupt);
|
|
}
|
|
}
|
|
|
|
static struct eth_context eth_0_context = {
|
|
.phy_duplex = kPHY_FullDuplex,
|
|
.phy_speed = kPHY_Speed100M,
|
|
.mac_addr = {
|
|
/* Freescale's OUI */
|
|
0x00,
|
|
0x04,
|
|
0x9f,
|
|
#if !defined(CONFIG_ETH_MCUX_0_RANDOM_MAC)
|
|
CONFIG_ETH_MCUX_0_MAC3,
|
|
CONFIG_ETH_MCUX_0_MAC4,
|
|
CONFIG_ETH_MCUX_0_MAC5
|
|
#endif
|
|
}
|
|
};
|
|
|
|
NET_DEVICE_INIT(eth_mcux_0, CONFIG_ETH_MCUX_0_NAME,
|
|
eth_0_init, ð_0_context,
|
|
NULL, CONFIG_ETH_INIT_PRIORITY, &api_funcs_0,
|
|
ETHERNET_L2, NET_L2_GET_CTX_TYPE(ETHERNET_L2), 1500);
|
|
|
|
static void eth_0_config_func(void)
|
|
{
|
|
IRQ_CONNECT(IRQ_ETH_RX, CONFIG_ETH_MCUX_0_IRQ_PRI,
|
|
eth_mcux_rx_isr, DEVICE_GET(eth_mcux_0), 0);
|
|
irq_enable(IRQ_ETH_RX);
|
|
|
|
IRQ_CONNECT(IRQ_ETH_TX, CONFIG_ETH_MCUX_0_IRQ_PRI,
|
|
eth_mcux_tx_isr, DEVICE_GET(eth_mcux_0), 0);
|
|
irq_enable(IRQ_ETH_TX);
|
|
|
|
IRQ_CONNECT(IRQ_ETH_ERR_MISC, CONFIG_ETH_MCUX_0_IRQ_PRI,
|
|
eth_mcux_error_isr, DEVICE_GET(eth_mcux_0), 0);
|
|
irq_enable(IRQ_ETH_ERR_MISC);
|
|
}
|