35 lines
1.5 KiB
YAML
35 lines
1.5 KiB
YAML
# Copyright (c) 2019 Brett Witherspoon
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# SPDX-License-Identifier: Apache-2.0
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description: |
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TI BoosterPack GPIO header
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GPIO pins exposed as BoosterPack headers on TI LaunchPads.
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BoosterPack plug-in modules are available in 20 and 40 pin variants. The
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20 pin variant has two 10 x 1 pin headers and the 40 pin variant has two
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10 x 2 pin headers. Both variants are compatible and stackable.
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The pins of the 20 pin variant and the outer row of the 40 pin variant are
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numbered 1 through 20. The inner rows of the 40 pin variant are numbered 21
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through 40. The BoosterPack pinout is depicted below:
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1 3.3V 21 5V 40 GPIO 20 GND
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2 Analog 22 GND 39 GPIO 19 GPIO / SPI CS
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3 UART RXD 23 Analog 38 GPIO 18 GPIO
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4 UART TXD 24 Analog 37 GPIO 17 GPIO
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5 GPIO 25 Analog 36 GPIO 16 RESET
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6 Analog 26 Analog 35 GPIO 15 SPI MOSI
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7 SPI CLK 27 Analog 34 GPIO 14 SPI MISO
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8 GPIO 28 Analog 33 GPIO 13 GPIO / SPI CS
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9 I2C SCL 29 32 GPIO 12 GPIO / SPI CS
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10 I2C SDA 30 31 GPIO 11 GPIO
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Additional information about the BoosterPack pinout can be found at
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http://processors.wiki.ti.com/index.php/BYOB or in the documentation for
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a TI LaunchPad development kit,
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compatible: "ti,boosterpack-header"
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include: [gpio-nexus.yaml, base.yaml]
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