Savinay Dharmappa 7be3236ca4 dts: interrupt_controller: Add dts support for DesignWare controller ... Add dts support for multilevel DW interrupt controller Change-Id: Ia16d6870bd3a46fca933c906aedc6ba78ed5131a Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>		2018-05-01 16:46:41 -04:00
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core	arch: xtensa: set __start as entry point for Xtensa.	2018-05-01 16:46:41 -04:00
include	xtensa/asm2: Save shift/loop registers on exception entry	2018-03-06 14:13:56 -08:00
soc	dts: interrupt_controller: Add dts support for DesignWare controller	2018-05-01 16:46:41 -04:00
CMakeLists.txt	arch: architecture defines kernel entry	2017-12-27 14:16:08 -05:00
Kconfig	doc: fix misspellings in XTENSA Kconfig	2018-02-22 15:28:04 -05:00