139 lines
3.2 KiB
C
139 lines
3.2 KiB
C
/*
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* Copyright (c) 2021 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_os_timer
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#include <zephyr/device.h>
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#include <zephyr/drivers/timer/system_timer.h>
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#include <zephyr/sys_clock.h>
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#include <zephyr/spinlock.h>
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#include "fsl_ostimer.h"
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#include "fsl_power.h"
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#define CYC_PER_TICK ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
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/ (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
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#define MAX_CYC INT_MAX
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#define MAX_TICKS ((MAX_CYC - CYC_PER_TICK) / CYC_PER_TICK)
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#define MIN_DELAY 1000
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#define TICKLESS IS_ENABLED(CONFIG_TICKLESS_KERNEL)
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static struct k_spinlock lock;
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static uint64_t last_count;
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static OSTIMER_Type *base;
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void mcux_lpc_ostick_isr(const void *arg)
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{
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ARG_UNUSED(arg);
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint64_t now = OSTIMER_GetCurrentTimerValue(base);
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uint32_t dticks = (uint32_t)((now - last_count) / CYC_PER_TICK);
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/* Clear interrupt flag by writing 1. */
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base->OSEVENT_CTRL &= ~OSTIMER_OSEVENT_CTRL_OSTIMER_INTENA_MASK;
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last_count += dticks * CYC_PER_TICK;
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if (!TICKLESS) {
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uint64_t next = last_count + CYC_PER_TICK;
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if ((int64_t)(next - now) < MIN_DELAY) {
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next += CYC_PER_TICK;
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}
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OSTIMER_SetMatchValue(base, next, NULL);
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}
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k_spin_unlock(&lock, key);
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sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ? dticks : 1);
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}
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void sys_clock_set_timeout(int32_t ticks, bool idle)
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{
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ARG_UNUSED(idle);
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
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/* Only for tickless kernel system */
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return;
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}
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ticks = ticks == K_TICKS_FOREVER ? MAX_TICKS : ticks;
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ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint64_t now = OSTIMER_GetCurrentTimerValue(base);
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uint32_t adj, cyc = ticks * CYC_PER_TICK;
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/* Round up to next tick boundary. */
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adj = (uint32_t)(now - last_count) + (CYC_PER_TICK - 1);
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if (cyc <= MAX_CYC - adj) {
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cyc += adj;
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} else {
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cyc = MAX_CYC;
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}
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cyc = (cyc / CYC_PER_TICK) * CYC_PER_TICK;
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if ((int32_t)(cyc + last_count - now) < MIN_DELAY) {
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cyc += CYC_PER_TICK;
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}
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OSTIMER_SetMatchValue(base, cyc + last_count, NULL);
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k_spin_unlock(&lock, key);
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}
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uint32_t sys_clock_elapsed(void)
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{
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
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/* Always return 0 for tickful kernel system */
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return 0;
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}
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint32_t ret = ((uint32_t)OSTIMER_GetCurrentTimerValue(base) -
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(uint32_t)last_count) / CYC_PER_TICK;
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k_spin_unlock(&lock, key);
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return ret;
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}
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uint32_t sys_clock_cycle_get_32(void)
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{
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return (uint32_t)OSTIMER_GetCurrentTimerValue(base);
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}
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uint64_t sys_clock_cycle_get_64(void)
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{
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return OSTIMER_GetCurrentTimerValue(base);
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}
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static int sys_clock_driver_init(const struct device *dev)
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{
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ARG_UNUSED(dev);
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/* Configure event timer's ISR */
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IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
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mcux_lpc_ostick_isr, NULL, 0);
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base = (OSTIMER_Type *)DT_INST_REG_ADDR(0);
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EnableDeepSleepIRQ(DT_INST_IRQN(0));
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/* Initialize the OS timer, setting clock configuration. */
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OSTIMER_Init(base);
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last_count = OSTIMER_GetCurrentTimerValue(base);
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OSTIMER_SetMatchValue(base, last_count + CYC_PER_TICK, NULL);
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/* Enable event timer interrupt */
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irq_enable(DT_INST_IRQN(0));
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return 0;
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}
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SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
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CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
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