150 lines
3.6 KiB
C
150 lines
3.6 KiB
C
/*
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* Copyright (c) 2016 Wind River Systems, Inc.
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* Copyright (c) 2018 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* this file is only meant to be included by kernel_structs.h */
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#ifndef _kernel_arch_func__h_
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#define _kernel_arch_func__h_
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#ifndef _ASMLANGUAGE
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* stack alignment related macros: STACK_ALIGN_SIZE is defined above */
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#define STACK_ROUND_UP(x) ROUND_UP(x, STACK_ALIGN_SIZE)
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#define STACK_ROUND_DOWN(x) ROUND_DOWN(x, STACK_ALIGN_SIZE)
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extern K_THREAD_STACK_DEFINE(_interrupt_stack, CONFIG_ISR_STACK_SIZE);
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/**
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*
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* @brief Performs architecture-specific initialization
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*
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* This routine performs architecture-specific initialization of the kernel.
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* Trivial stuff is done inline; more complex initialization is done via
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* function calls.
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*
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* @return N/A
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*/
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static inline void kernel_arch_init(void)
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{
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_kernel.nested = 0;
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_kernel.irq_stack = K_THREAD_STACK_BUFFER(_interrupt_stack) +
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CONFIG_ISR_STACK_SIZE;
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#if CONFIG_X86_STACK_PROTECTION
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_x86_mmu_set_flags(_interrupt_stack, MMU_PAGE_SIZE,
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MMU_ENTRY_NOT_PRESENT, MMU_PTE_P_MASK);
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#endif
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}
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/**
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*
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* @brief Set the return value for the specified thread (inline)
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*
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* @param thread pointer to thread
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* @param value value to set as return value
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*
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* The register used to store the return value from a function call invocation
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* is set to @a value. It is assumed that the specified @a thread is pending, and
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* thus the threads context is stored in its TCS.
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*
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* @return N/A
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*/
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static ALWAYS_INLINE void
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_set_thread_return_value(struct k_thread *thread, unsigned int value)
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{
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/* write into 'eax' slot created in _Swap() entry */
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*(unsigned int *)(thread->callee_saved.esp) = value;
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}
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extern void k_cpu_atomic_idle(unsigned int imask);
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/**
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* @brief Write to a model specific register (MSR)
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*
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* This function is used to write to an MSR.
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*
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* The definitions of the so-called "Architectural MSRs" are contained
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* in kernel_structs.h and have the format: IA32_XXX_MSR
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*
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* @return N/A
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*/
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static inline void _x86_msr_write(unsigned int msr, u64_t data)
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{
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u32_t high = data >> 32;
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u32_t low = data & 0xFFFFFFFF;
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__asm__ volatile ("wrmsr" : : "c"(msr), "a"(low), "d"(high));
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}
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/**
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* @brief Read from a model specific register (MSR)
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*
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* This function is used to read from an MSR.
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*
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* The definitions of the so-called "Architectural MSRs" are contained
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* in kernel_structs.h and have the format: IA32_XXX_MSR
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*
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* @return N/A
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*/
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static inline u64_t _x86_msr_read(unsigned int msr)
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{
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u64_t ret;
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__asm__ volatile("rdmsr" : "=A" (ret) : "c" (msr));
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return ret;
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}
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#ifdef CONFIG_JAILHOUSE_X2APIC
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#define MSR_X2APIC_BASE 0x00000800
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static inline u32_t read_x2apic(unsigned int reg)
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{
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return _x86_msr_read(MSR_X2APIC_BASE + reg);
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}
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static inline void write_x2apic(unsigned int reg, u32_t val)
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{
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_x86_msr_write(MSR_X2APIC_BASE + reg, val);
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}
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#endif
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/*
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* _IntLibInit() is called from the non-arch specific function,
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* prepare_multithreading(). The IA-32 kernel does not require any special
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* initialization of the interrupt subsystem. However, we still need to
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* provide an _IntLibInit() of some sort to prevent build errors.
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*/
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static inline void _IntLibInit(void)
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{
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}
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/* the _idt_base_address symbol is generated via a linker script */
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extern unsigned char _idt_base_address[];
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extern FUNC_NORETURN void _x86_userspace_enter(k_thread_entry_t user_entry,
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void *p1, void *p2, void *p3,
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u32_t stack_end,
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u32_t stack_start);
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#include <stddef.h> /* For size_t */
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#ifdef __cplusplus
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}
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#endif
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#define _is_in_isr() (_kernel.nested != 0)
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#endif /* _ASMLANGUAGE */
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#endif /* _kernel_arch_func__h_ */
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