OrgZephyr/zephyr
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zephyr
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zephyr/soc/riscv
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Nicolas Pitre 3aab212920 riscv: Microchip Mi-V should use built-in atomic operations 
The Mi-V implements the A extension therefore it shouldn't use the C
version. The built-in version generates code with proper machine
opcodes.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
 		2023-05-09 13:04:27 +02:00
..
esp32c3 soc: kconfig: Add config for ESP32 family 2023-04-19 17:12:26 +02:00
litex-vexriscv
…
openisa_rv32m1 init: remove the need for a dummy device pointer in SYS_INIT functions 2023-04-12 14:28:07 +00:00
riscv-ite ITE: drivers/i2c: Disable pre-detect on IT82xx2 family 2023-04-26 12:55:02 +02:00
riscv-privilege riscv: Microchip Mi-V should use built-in atomic operations 2023-05-09 13:04:27 +02:00
CMakeLists.txt
…