f8c8ee65be
Glitches were observed if a GPIO pin was configured by ROM to a non-default state and then Zephyr PINCTRL reconfigured the pin. The fix involves using the correct PINCTRL YAML output enable and state flags. Reading the current spin state and reflecting into new pin configuration if the pin is output and the drive low/high properties are not present. We also take advantage of GPIO hardware reflecing the alternate output value in the parallel output bit before enabling parallel output mode. Interpret boolean flags with both enable and disable as do not touch if neither flag is present. We give precedence to enable over disable if both flags mistakenly appear. Note, PINCTRL always clears the GPIO control input pad disable bit. Signed-off-by: Manimaran A <manimaran.a@microchip.com> |
||
---|---|---|
.. | ||
common | ||
mec172x | ||
mec1501 | ||
mec1701 | ||
CMakeLists.txt | ||
Kconfig | ||
Kconfig.defconfig | ||
Kconfig.soc |