85 lines
1.8 KiB
Plaintext
85 lines
1.8 KiB
Plaintext
/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/stm32f405-pinctrl.dtsi>
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#include <st/stm32f401.dtsi>
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/ {
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ccm0: memory@10000000 {
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compatible = "st,stm32-ccm";
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reg = <0x10000000 DT_CCM_SIZE>;
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};
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soc {
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pinctrl: pin-controller@40020000 {
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reg = <0x40020000 0x2400>;
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gpiof: gpio@40021400 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40021400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
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label = "GPIOF";
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};
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gpiog: gpio@40021800 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40021800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000040>;
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label = "GPIOG";
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};
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gpioh: gpio@40021c00 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40021c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000040>;
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label = "GPIOH";
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};
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gpioi: gpio@40022000 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x40022000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000100>;
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label = "GPIOI";
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};
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};
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usart3: serial@40004800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
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interrupts = <39 0>;
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status = "disabled";
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label = "UART_3";
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};
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uart4: serial@40004c00 {
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compatible ="st,stm32-uart";
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reg = <0x40004c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
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interrupts = <52 0>;
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status = "disabled";
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label = "UART_4";
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};
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uart5: serial@40005000 {
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compatible = "st,stm32-uart";
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reg = <0x40005000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
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interrupts = <53 0>;
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status = "disabled";
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label = "UART_5";
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};
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};
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};
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