80 lines
1.5 KiB
Plaintext
80 lines
1.5 KiB
Plaintext
/*
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* Copyright (c) 2022 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 6)>,
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<NRF_PSEL(UART_RX, 0, 8)>,
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<NRF_PSEL(UART_RTS, 0, 7)>,
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<NRF_PSEL(UART_CTS, 0, 11)>;
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};
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};
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uart0_sleep: uart0_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 6)>,
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<NRF_PSEL(UART_RX, 0, 8)>,
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<NRF_PSEL(UART_RTS, 0, 7)>,
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<NRF_PSEL(UART_CTS, 0, 11)>;
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low-power-enable;
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};
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};
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uart1_default: uart1_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 1)>,
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<NRF_PSEL(UART_RX, 1, 2)>;
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};
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};
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uart1_sleep: uart1_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 1)>,
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<NRF_PSEL(UART_RX, 1, 2)>;
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low-power-enable;
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};
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};
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i2c1_default: i2c1_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 14)>,
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<NRF_PSEL(TWIM_SCL, 0, 13)>;
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};
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};
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i2c1_sleep: i2c1_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 14)>,
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<NRF_PSEL(TWIM_SCL, 0, 13)>;
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low-power-enable;
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};
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};
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qspi_default: qspi_default {
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group1 {
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psels = <NRF_PSEL(QSPI_SCK, 1, 11)>,
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<NRF_PSEL(QSPI_IO0, 1, 15)>,
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<NRF_PSEL(QSPI_IO1, 1, 14)>,
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<NRF_PSEL(QSPI_IO2, 1, 13)>,
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<NRF_PSEL(QSPI_IO3, 1, 12)>,
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<NRF_PSEL(QSPI_CSN, 1, 10)>;
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};
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};
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qspi_sleep: qspi_sleep {
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group1 {
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psels = <NRF_PSEL(QSPI_SCK, 1, 11)>,
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<NRF_PSEL(QSPI_IO0, 1, 15)>,
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<NRF_PSEL(QSPI_IO1, 1, 14)>,
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<NRF_PSEL(QSPI_IO2, 1, 13)>,
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<NRF_PSEL(QSPI_IO3, 1, 12)>,
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<NRF_PSEL(QSPI_CSN, 1, 10)>;
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low-power-enable;
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};
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};
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};
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