129 lines
2.8 KiB
C
129 lines
2.8 KiB
C
/*
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* Copyright (c) 2016 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/pm/pm.h>
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#include <soc.h>
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#include <soc_power.h>
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#include <zephyr/arch/cpu.h>
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio0))
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#define CLK_BIT_GPIO0 _BEETLE_GPIO0
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#else
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#define CLK_BIT_GPIO0 0
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#endif
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio1))
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#define CLK_BIT_GPIO1 _BEETLE_GPIO1
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#else
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#define CLK_BIT_GPIO1 0
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#endif
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#define AHB_CLK_BITS (CLK_BIT_GPIO0 | CLK_BIT_GPIO1)
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(timer0))
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#define CLK_BIT_TIMER0 _BEETLE_TIMER0
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#else
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#define CLK_BIT_TIMER0 0
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#endif
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(timer1))
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#define CLK_BIT_TIMER1 _BEETLE_TIMER1
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#else
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#define CLK_BIT_TIMER1 0
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#endif
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#ifdef CONFIG_RUNTIME_NMI
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#define CLK_BIT_WDOG _BEETLE_WDOG
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#else
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#define CLK_BIT_WDOG 0
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#endif
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart0))
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#define CLK_BIT_UART0 _BEETLE_UART0
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#else
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#define CLK_BIT_UART0 0
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#endif
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart1))
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#define CLK_BIT_UART1 _BEETLE_UART1
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#else
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#define CLK_BIT_UART1 0
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#endif
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#define APB_CLK_BITS (CLK_BIT_TIMER0 | CLK_BIT_TIMER1 \
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| CLK_BIT_WDOG | CLK_BIT_UART0 | CLK_BIT_UART1)
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/**
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* @brief Setup various clock on SoC in active state.
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*
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* Configures the clock in active state.
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*/
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static ALWAYS_INLINE void clock_active_init(void)
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{
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/* Enable AHB and APB clocks */
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/* Configure AHB Peripheral Clock in active state */
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__BEETLE_SYSCON->ahbclkcfg0set = AHB_CLK_BITS;
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/* Configure APB Peripheral Clock in active state */
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__BEETLE_SYSCON->apbclkcfg0set = APB_CLK_BITS;
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}
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/**
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* @brief Configures the clock that remain active during sleep state.
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*
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* Configures the clock that remain active during sleep state.
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*/
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static ALWAYS_INLINE void clock_sleep_init(void)
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{
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/* Configure APB Peripheral Clock in sleep state */
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__BEETLE_SYSCON->apbclkcfg1set = APB_CLK_BITS;
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}
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/**
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* @brief Configures the clock that remain active during deepsleep state.
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*
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* Configures the clock that remain active during deepsleep state.
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*/
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static ALWAYS_INLINE void clock_deepsleep_init(void)
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{
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/* Configure APB Peripheral Clock in deep sleep state */
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__BEETLE_SYSCON->apbclkcfg2set = APB_CLK_BITS;
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}
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/**
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* @brief Setup initial wakeup sources on SoC.
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*
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* Setup the SoC wakeup sources.
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*
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*/
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static ALWAYS_INLINE void wakeup_src_init(void)
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{
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/* Configure Wakeup Sources */
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__BEETLE_SYSCON->pwrdncfg1set = APB_CLK_BITS;
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}
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/**
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* @brief Setup various clocks and wakeup sources in the SoC.
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*
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* Configures the clocks and wakeup sources in the SoC.
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*/
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void soc_power_init(void)
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{
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/* Setup active state clocks */
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clock_active_init();
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/* Setup sleep active clocks */
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clock_sleep_init();
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/* Setup deepsleep active clocks */
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clock_deepsleep_init();
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/* Setup initial wakeup sources */
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wakeup_src_init();
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}
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