Jaxson Han fd231e32e9 arm64: Fix booting issue with FVP V8R >= 11.16.16 ... In the Armv8R AArch64 profile[1], the Armv8R AArch64 is always in secure mode. But the FVP_BaseR_AEMv8R before version 11.16.16 doesn't strictly follow this rule. It still has some non-secure registers (e.g. CNTHP_CTL_EL2). Since version 11.16.16, the FVP_BaseR_AEMv8R has fixed this issue. The CNTHP_XXX_EL2 registers have been changed to CNTHPS_XXX_EL2. So the FVP_BaseR_AEMv8R (version >= 11.16.16) cannot boot Zephyr. This patch will fix it. [1] https://developer.arm.com/documentation/ddi0600/latest/ Signed-off-by: Jaxson Han <jaxson.han@arm.com> Change-Id: If986f34dc080ae7a8b226bba589b6fe616a4260b		2022-03-08 11:09:13 +01:00
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cortex_r	…
offsets	…
xen	…
CMakeLists.txt	…
Kconfig	kconfig: Rename the TEST_EXTRA stack size option to align with the rest	2022-02-22 08:23:05 -05:00
boot.h	…
cache.c	arm64: cache: Fix data corruption issue on DCACHE range invalidation	2022-02-21 22:00:16 -05:00
cpu_idle.S	…
fatal.c	…
fpu.S	…
fpu.c	…
header.S	…
irq_init.c	…
irq_manage.c	…
irq_offload.c	…
isr_wrapper.S	arm64: switch to the IRQ stack during ISR execution	2022-02-21 21:53:23 -05:00
macro_priv.inc	arm64: update _current_cpu->nested properly	2022-02-21 21:53:23 -05:00
mmu.S	…
mmu.c	…
mmu.h	…
prep_c.c	arm64: simple memcpy/memset alternatives to be used during early boot	2022-02-21 21:00:12 -05:00
reset.S	…
reset.c	arm64: Fix booting issue with FVP V8R >= 11.16.16	2022-03-08 11:09:13 +01:00
smccc-call.S	…
smp.c	…
switch.S	arm64: switch to the IRQ stack during ISR execution	2022-02-21 21:53:23 -05:00
thread.c	kernel: Reset the switch_handler only in the arch code	2022-01-18 10:41:35 -05:00
tls.c	…
userspace.S	…
vector_table.S	…