147 lines
3.1 KiB
Plaintext
147 lines
3.1 KiB
Plaintext
/*
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* Copyright (c) 2018 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <skeleton.dtsi>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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clock-frequency = <0>;
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compatible = "microsemi,miv", "riscv";
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device_type = "cpu";
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reg = < 0x0 >;
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riscv,isa = "rv64imac";
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hlic0: interrupt-controller {
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compatible = "riscv,cpu-intc";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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};
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cpu@1 {
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clock-frequency = <0>;
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compatible = "microsemi,miv", "riscv";
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device_type = "cpu";
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reg = < 0x1 >;
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riscv,isa = "rv64imafdc";
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hlic1: interrupt-controller {
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compatible = "riscv,cpu-intc";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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sram0: memory@8000000 {
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compatible = "mmio-sram";
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reg = <0x8000000 0x80000>;
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};
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sram1: memory@80000000 {
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compatible = "mmio-sram";
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reg = <0x80000000 0x800000>;
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};
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clint: clint@2000000 {
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compatible = "sifive,clint0";
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interrupts-extended = <&hlic0 3 &hlic0 7
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&hlic1 3 &hlic1 7>;
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interrupt-names = "soft0", "timer0", "soft1", "timer1";
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reg = <0x2000000 0x10000>;
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};
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plic: interrupt-controller@c000000 {
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compatible = "sifive,plic-1.0.0";
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#interrupt-cells = <2>;
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#address-cells = <1>;
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interrupt-controller;
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interrupts-extended = <&hlic0 11
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&hlic1 11>;
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reg = <0x0c000000 0x00002000
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0x0c002000 0x001fe000
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0x0c200000 0x3e000000>;
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reg-names = "prio", "irq_en", "reg";
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riscv,max-priority = <7>;
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riscv,ndev = <187>;
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};
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uart0: uart@20000000 {
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compatible = "ns16550";
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reg = <0x20000000 0x1000>;
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clock-frequency = <150000000>;
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current-speed = <115200>;
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interrupt-parent = <&plic>;
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interrupts = <90 1>;
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reg-shift = <2>;
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status = "disabled";
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};
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qspi0: spi@21000000 {
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compatible = "microchip,mpfs-qspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x21000000 0x1000>;
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interrupt-parent = <&plic>;
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interrupts = <85 1>;
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status = "disabled";
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clock-frequency = <150000000>;
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};
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gpio0: gpio@20120000 {
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compatible = "microchip,mpfs-gpio";
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reg = <0x20120000 0x1000>;
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interrupt-parent = <&plic>;
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interrupts = <51 1>;
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interrupt-controller;
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#interrupt-cells = <1>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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status = "disabled";
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};
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gpio1: gpio@20121000 {
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compatible = "microchip,mpfs-gpio";
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reg = <0x20121000 0x1000>;
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interrupt-parent = <&plic>;
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interrupts = <52 1>;
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interrupt-controller;
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#interrupt-cells = <1>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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status = "disabled";
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};
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gpio2: gpio@20122000 {
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compatible = "microchip,mpfs-gpio";
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reg = <0x20122000 0x1000>;
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interrupt-parent = <&plic>;
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interrupts = <53 1>;
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interrupt-controller;
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#interrupt-cells = <1>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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status = "disabled";
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};
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};
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};
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