71 lines
2.2 KiB
C
71 lines
2.2 KiB
C
/*
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* Copyright (c) 2020 Mohamed ElShahawi.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_CLOCK_CONTROL_ESP32_CLOCK_H_
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#define ZEPHYR_DRIVERS_CLOCK_CONTROL_ESP32_CLOCK_H_
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#include <soc/efuse_reg.h>
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/*
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* Convenience macros for the above functions.
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*/
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#define I2C_WRITEREG_RTC(block, reg_add, indata) \
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esp32_rom_i2c_writeReg(block, block##_HOSTID, reg_add, indata)
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#define I2C_READREG_RTC(block, reg_add) \
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esp32_rom_i2c_readReg(block, block##_HOSTID, reg_add)
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/*
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* Get voltage level for CPU to run at 240 MHz, or for flash/PSRAM to run at 80 MHz.
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* 0x0: level 7; 0x1: level 6; 0x2: level 5; 0x3: level 4. (RO)
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*/
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#define RTC_CNTL_DBIAS_HP_VOLT (RTC_CNTL_DBIAS_1V25 - (REG_GET_FIELD(EFUSE_BLK0_RDATA5_REG, EFUSE_RD_VOL_LEVEL_HP_INV)))
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#ifdef CONFIG_ESPTOOLPY_FLASHFREQ_80M
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#define DIG_DBIAS_80M_160M RTC_CNTL_DBIAS_HP_VOLT
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#else
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#define DIG_DBIAS_80M_160M RTC_CNTL_DBIAS_1V10
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#endif
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#define DIG_DBIAS_240M RTC_CNTL_DBIAS_HP_VOLT
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#define DIG_DBIAS_XTAL RTC_CNTL_DBIAS_1V10
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#define DIG_DBIAS_2M RTC_CNTL_DBIAS_1V00
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#define DELAY_PLL_DBIAS_RAISE 3
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/**
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* Register definitions for digital PLL (BBPLL)
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* This file lists register fields of BBPLL, located on an internal configuration
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* bus.
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*/
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#define I2C_BBPLL 0x66
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#define I2C_BBPLL_HOSTID 4
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#define I2C_BBPLL_IR_CAL_DELAY 0
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#define I2C_BBPLL_IR_CAL_EXT_CAP 1
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#define I2C_BBPLL_OC_LREF 2
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#define I2C_BBPLL_OC_DIV_7_0 3
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#define I2C_BBPLL_OC_ENB_FCAL 4
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#define I2C_BBPLL_OC_DCUR 5
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#define I2C_BBPLL_BBADC_DSMP 9
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#define I2C_BBPLL_OC_ENB_VCON 10
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#define I2C_BBPLL_ENDIV5 11
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#define I2C_BBPLL_BBADC_CAL_7_0 12
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/* BBPLL configuration values */
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#define BBPLL_ENDIV5_VAL_320M 0x43
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#define BBPLL_BBADC_DSMP_VAL_320M 0x84
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#define BBPLL_ENDIV5_VAL_480M 0xc3
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#define BBPLL_BBADC_DSMP_VAL_480M 0x74
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#define BBPLL_IR_CAL_DELAY_VAL 0x18
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#define BBPLL_IR_CAL_EXT_CAP_VAL 0x20
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#define BBPLL_OC_ENB_FCAL_VAL 0x9a
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#define BBPLL_OC_ENB_VCON_VAL 0x00
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#define BBPLL_BBADC_CAL_7_0_VAL 0x00
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extern uint32_t esp32_rom_g_ticks_per_us_pro;
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extern uint32_t esp32_rom_g_ticks_per_us_app;
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extern void esp32_rom_ets_delay_us(uint32_t us);
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#endif /* ZEPHYR_DRIVERS_CLOCK_CONTROL_ESP32_CLOCK_H_ */
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