320 lines
7.9 KiB
C
320 lines
7.9 KiB
C
/*
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* Copyright (c) 2019 Brett Witherspoon
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ti_cc13xx_cc26xx_gpio
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#include <zephyr/types.h>
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#include <zephyr/sys/__assert.h>
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#include <zephyr/device.h>
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#include <errno.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/dt-bindings/gpio/ti-cc13xx-cc26xx-gpio.h>
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#include <driverlib/gpio.h>
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#include <driverlib/interrupt.h>
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#include <driverlib/ioc.h>
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#include <driverlib/prcm.h>
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#include <inc/hw_aon_event.h>
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#include <ti/drivers/Power.h>
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#include <ti/drivers/power/PowerCC26XX.h>
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#include <zephyr/irq.h>
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#include "gpio_utils.h"
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/* bits 16-18 in iocfg registers correspond to interrupt settings */
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#define IOCFG_INT_MASK 0x00070000
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/* the rest are for general (non-interrupt) config */
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#define IOCFG_GEN_MASK (~IOCFG_INT_MASK)
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struct gpio_cc13xx_cc26xx_data {
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/* gpio_driver_data needs to be first */
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struct gpio_driver_data common;
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sys_slist_t callbacks;
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};
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static struct gpio_cc13xx_cc26xx_data gpio_cc13xx_cc26xx_data_0;
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static const struct gpio_driver_config gpio_cc13xx_cc26xx_cfg_0 = {
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(0),
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};
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static int gpio_cc13xx_cc26xx_port_set_bits_raw(const struct device *port,
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uint32_t mask);
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static int gpio_cc13xx_cc26xx_port_clear_bits_raw(const struct device *port,
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uint32_t mask);
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static int gpio_cc13xx_cc26xx_config(const struct device *port,
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gpio_pin_t pin,
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gpio_flags_t flags)
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{
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uint32_t config = 0;
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__ASSERT_NO_MSG(pin < NUM_IO_MAX);
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switch (flags & (GPIO_INPUT | GPIO_OUTPUT)) {
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case GPIO_INPUT:
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config = IOC_INPUT_ENABLE;
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break;
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case GPIO_OUTPUT:
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config = IOC_INPUT_DISABLE;
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break;
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case 0: /* disconnected */
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IOCPortConfigureSet(pin, IOC_PORT_GPIO, IOC_NO_IOPULL);
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GPIO_setOutputEnableDio(pin, GPIO_OUTPUT_DISABLE);
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return 0;
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default:
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return -ENOTSUP;
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}
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config |= IOC_SLEW_DISABLE | IOC_NO_WAKE_UP;
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config |= (flags & CC13XX_CC26XX_GPIO_DEBOUNCE) ?
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IOC_HYST_ENABLE : IOC_HYST_DISABLE;
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switch (flags & CC13XX_CC26XX_GPIO_DS_MASK) {
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case CC13XX_CC26XX_GPIO_DS_DFLT:
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config |= IOC_CURRENT_2MA | IOC_STRENGTH_AUTO;
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break;
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case CC13XX_CC26XX_GPIO_DS_ALT:
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/*
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* Not all GPIO support 8ma, but setting that bit will use the
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* highest supported drive strength.
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*/
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config |= IOC_CURRENT_8MA | IOC_STRENGTH_MAX;
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break;
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default:
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return -ENOTSUP;
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}
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switch (flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) {
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case 0:
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config |= IOC_NO_IOPULL;
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break;
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case GPIO_PULL_UP:
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config |= IOC_IOPULL_UP;
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break;
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case GPIO_PULL_DOWN:
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config |= IOC_IOPULL_DOWN;
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break;
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default:
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return -EINVAL;
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}
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config |= IOCPortConfigureGet(pin) & IOCFG_INT_MASK;
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IOCPortConfigureSet(pin, IOC_PORT_GPIO, config);
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if ((flags & GPIO_OUTPUT) != 0) {
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0) {
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gpio_cc13xx_cc26xx_port_set_bits_raw(port, BIT(pin));
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0) {
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gpio_cc13xx_cc26xx_port_clear_bits_raw(port, BIT(pin));
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}
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GPIO_setOutputEnableDio(pin, GPIO_OUTPUT_ENABLE);
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} else {
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GPIO_setOutputEnableDio(pin, GPIO_OUTPUT_DISABLE);
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}
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return 0;
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}
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static int gpio_cc13xx_cc26xx_port_get_raw(const struct device *port,
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uint32_t *value)
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{
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__ASSERT_NO_MSG(value != NULL);
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*value = GPIO_readMultiDio(GPIO_DIO_ALL_MASK);
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return 0;
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}
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static int gpio_cc13xx_cc26xx_port_set_masked_raw(const struct device *port,
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uint32_t mask,
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uint32_t value)
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{
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GPIO_setMultiDio(mask & value);
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GPIO_clearMultiDio(mask & ~value);
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return 0;
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}
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static int gpio_cc13xx_cc26xx_port_set_bits_raw(const struct device *port,
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uint32_t mask)
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{
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GPIO_setMultiDio(mask);
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return 0;
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}
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static int gpio_cc13xx_cc26xx_port_clear_bits_raw(const struct device *port,
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uint32_t mask)
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{
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GPIO_clearMultiDio(mask);
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return 0;
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}
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static int gpio_cc13xx_cc26xx_port_toggle_bits(const struct device *port,
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uint32_t mask)
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{
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GPIO_toggleMultiDio(mask);
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return 0;
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}
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static int gpio_cc13xx_cc26xx_pin_interrupt_configure(const struct device *port,
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gpio_pin_t pin,
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enum gpio_int_mode mode,
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enum gpio_int_trig trig)
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{
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uint32_t config = 0;
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if (mode != GPIO_INT_MODE_DISABLED) {
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if (mode == GPIO_INT_MODE_EDGE) {
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if (trig == GPIO_INT_TRIG_BOTH) {
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config |= IOC_BOTH_EDGES;
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} else if (trig == GPIO_INT_TRIG_HIGH) {
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config |= IOC_RISING_EDGE;
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} else { /* GPIO_INT_TRIG_LOW */
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config |= IOC_FALLING_EDGE;
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}
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} else {
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return -ENOTSUP;
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}
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config |= IOC_INT_ENABLE;
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} else {
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config |= IOC_INT_DISABLE | IOC_NO_EDGE;
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}
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config |= IOCPortConfigureGet(pin) & IOCFG_GEN_MASK;
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IOCPortConfigureSet(pin, IOC_PORT_GPIO, config);
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return 0;
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}
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static int gpio_cc13xx_cc26xx_manage_callback(const struct device *port,
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struct gpio_callback *callback,
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bool set)
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{
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struct gpio_cc13xx_cc26xx_data *data = port->data;
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return gpio_manage_callback(&data->callbacks, callback, set);
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}
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static uint32_t gpio_cc13xx_cc26xx_get_pending_int(const struct device *dev)
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{
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return GPIO_getEventMultiDio(GPIO_DIO_ALL_MASK);
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}
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static void gpio_cc13xx_cc26xx_isr(const struct device *dev)
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{
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struct gpio_cc13xx_cc26xx_data *data = dev->data;
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uint32_t status = GPIO_getEventMultiDio(GPIO_DIO_ALL_MASK);
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GPIO_clearEventMultiDio(status);
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gpio_fire_callbacks(&data->callbacks, dev, status);
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}
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static int gpio_cc13xx_cc26xx_init(const struct device *dev)
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{
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#ifdef CONFIG_PM
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/* Set dependency on gpio resource to turn on power domains */
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Power_setDependency(PowerCC26XX_PERIPH_GPIO);
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#else
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/* Enable peripheral power domain */
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PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
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/* Enable GPIO peripheral */
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PRCMPeripheralRunEnable(PRCM_PERIPH_GPIO);
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/* Load PRCM settings */
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PRCMLoadSet();
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while (!PRCMLoadGet()) {
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continue;
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}
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#endif
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/* Enable edge detection on any pad as a wakeup source */
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HWREG(AON_EVENT_BASE + AON_EVENT_O_MCUWUSEL) =
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(HWREG(AON_EVENT_BASE + AON_EVENT_O_MCUWUSEL) &
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(~AON_EVENT_MCUWUSEL_WU1_EV_M)) |
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AON_EVENT_MCUWUSEL_WU1_EV_PAD;
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/* Enable IRQ */
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IRQ_CONNECT(DT_INST_IRQN(0),
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DT_INST_IRQ(0, priority),
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gpio_cc13xx_cc26xx_isr, DEVICE_DT_INST_GET(0), 0);
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irq_enable(DT_INST_IRQN(0));
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/* Peripheral should not be accessed until power domain is on. */
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while (PRCMPowerDomainsAllOn(PRCM_DOMAIN_PERIPH) !=
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PRCM_DOMAIN_POWER_ON) {
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continue;
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}
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return 0;
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}
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#ifdef CONFIG_GPIO_GET_DIRECTION
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static int gpio_cc13xx_cc26xx_port_get_direction(const struct device *port, gpio_port_pins_t map,
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gpio_port_pins_t *inputs,
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gpio_port_pins_t *outputs)
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{
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uint32_t pin;
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gpio_port_pins_t ip = 0;
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gpio_port_pins_t op = 0;
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const struct gpio_driver_config *cfg = port->config;
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map &= cfg->port_pin_mask;
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if (inputs != NULL) {
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for (pin = find_lsb_set(map) - 1; map;
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map &= ~BIT(pin), pin = find_lsb_set(map) - 1) {
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ip |= !!(IOCPortConfigureGet(pin) & IOC_INPUT_ENABLE) * BIT(pin);
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}
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*inputs = ip;
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}
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if (outputs != NULL) {
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for (pin = find_lsb_set(map) - 1; map;
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map &= ~BIT(pin), pin = find_lsb_set(map) - 1) {
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op |= GPIO_getOutputEnableDio(pin) * BIT(pin);
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}
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*outputs = op;
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}
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return 0;
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}
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#endif /* CONFIG_GPIO_GET_DIRECTION */
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static const struct gpio_driver_api gpio_cc13xx_cc26xx_driver_api = {
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.pin_configure = gpio_cc13xx_cc26xx_config,
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.port_get_raw = gpio_cc13xx_cc26xx_port_get_raw,
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.port_set_masked_raw = gpio_cc13xx_cc26xx_port_set_masked_raw,
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.port_set_bits_raw = gpio_cc13xx_cc26xx_port_set_bits_raw,
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.port_clear_bits_raw = gpio_cc13xx_cc26xx_port_clear_bits_raw,
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.port_toggle_bits = gpio_cc13xx_cc26xx_port_toggle_bits,
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.pin_interrupt_configure = gpio_cc13xx_cc26xx_pin_interrupt_configure,
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.manage_callback = gpio_cc13xx_cc26xx_manage_callback,
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.get_pending_int = gpio_cc13xx_cc26xx_get_pending_int,
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#ifdef CONFIG_GPIO_GET_DIRECTION
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.port_get_direction = gpio_cc13xx_cc26xx_port_get_direction,
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#endif /* CONFIG_GPIO_GET_DIRECTION */
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};
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DEVICE_DT_INST_DEFINE(0, gpio_cc13xx_cc26xx_init,
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NULL, &gpio_cc13xx_cc26xx_data_0,
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&gpio_cc13xx_cc26xx_cfg_0,
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PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY,
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&gpio_cc13xx_cc26xx_driver_api);
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