83 lines
1.4 KiB
ArmAsm
83 lines
1.4 KiB
ArmAsm
/*
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* Copyright (c) 2021 Telink Semiconductor
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define NDS_MCACHE_CTL 0x7CA
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#define NDS_MMISC_CTL 0x7D0
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#include <zephyr/toolchain.h>
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.option push
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.option norelax
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.org 0x0
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/* exports */
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GTEXT(entry)
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SECTION_FUNC(init, init)
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entry:
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j start
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.org 0x20
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.word ('T'<<24 | 'L'<<16 | 'N'<<8 | 'K')
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.org 0x26
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.short (0x173B)
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.align 2
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start:
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/* Enable I/D-Cache */
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csrr t0, NDS_MCACHE_CTL
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ori t0, t0, 1 #/I-Cache
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ori t0, t0, 2 #/D-Cache
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csrw NDS_MCACHE_CTL, t0
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fence.i
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/* Enable misaligned access and non-blocking load */
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li t0, (1 << 8) | (1 << 6)
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csrs NDS_MMISC_CTL, t0
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_ZERO_AES:
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lui t0, 0
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la t2, _AES_DATA_VMA_START
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la t3, _AES_DATA_VMA_END
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_ZERO_AES_BEGIN:
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bleu t3, t2, _RETENTION_DATA_INIT
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sw t0, 0(t2)
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addi t2, t2, 4
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j _ZERO_AES_BEGIN
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_RETENTION_DATA_INIT:
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la t1, _RETENTION_DATA_LMA_START
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la t2, _RETENTION_DATA_VMA_START
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la t3, _RETENTION_DATA_VMA_END
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_RETENTION_DATA_INIT_BEGIN:
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bleu t3, t2, _RAMCODE_INIT
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lw t0, 0(t1)
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sw t0, 0(t2)
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addi t1, t1, 4
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addi t2, t2, 4
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j _RETENTION_DATA_INIT_BEGIN
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_RAMCODE_INIT:
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la t1, _RAMCODE_LMA_START
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la t2, _RAMCODE_VMA_START
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la t3, _RAMCODE_VMA_END
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_RAMCODE_INIT_BEGIN:
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bleu t3, t2, _START
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lw t0, 0(t1)
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sw t0, 0(t2)
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addi t1, t1, 4
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addi t2, t2, 4
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j _RAMCODE_INIT_BEGIN
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_START:
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j __start
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.option pop
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