70 lines
2.5 KiB
C
70 lines
2.5 KiB
C
/*
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* Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __SOC_H__
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#define __SOC_H__
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#ifndef _ASMLANGUAGE
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#include <rom/ets_sys.h>
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#include <rom/spi_flash.h>
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#include <zephyr/types.h>
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#include <stdbool.h>
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#include <esp_clk.h>
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#endif
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#include <arch/riscv/arch.h>
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/* IRQ numbers */
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#define RISCV_MACHINE_SOFT_IRQ 3 /* Machine Software Interrupt */
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#define RISCV_MACHINE_TIMER_IRQ 7 /* Machine Timer Interrupt */
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#define RISCV_MACHINE_EXT_IRQ 11 /* Machine External Interrupt */
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/* ECALL Exception numbers */
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#define SOC_MCAUSE_ECALL_EXP 11 /* Machine ECALL instruction */
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#define SOC_MCAUSE_USER_ECALL_EXP 8 /* User ECALL instruction */
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/* Interrupt Mask */
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#define SOC_MCAUSE_IRQ_MASK (1 << 31)
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/* Exception code Mask */
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#define SOC_MCAUSE_EXP_MASK 0x7FFFFFFF
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/* SOC-Specific EXIT ISR command */
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#define SOC_ERET mret
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#ifndef _ASMLANGUAGE
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void __esp_platform_start(void);
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extern void esp_rom_intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
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extern void esp_rom_uart_attach(void);
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extern void esp_rom_uart_tx_wait_idle(uint8_t uart_no);
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extern STATUS esp_rom_uart_tx_one_char(uint8_t chr);
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extern STATUS esp_rom_uart_rx_one_char(uint8_t *chr);
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extern int esp_rom_gpio_matrix_in(uint32_t gpio, uint32_t signal_index, bool inverted);
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extern int esp_rom_gpio_matrix_out(uint32_t gpio, uint32_t signal_index,
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bool out_invrted, bool out_enabled_inverted);
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extern void esp_rom_ets_set_user_start(uint32_t start);
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extern void esprv_intc_int_set_threshold(int priority_threshold);
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uint32_t soc_intr_get_next_source(void);
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extern void esp_rom_Cache_Resume_ICache(uint32_t autoload);
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extern int esp_rom_Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
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extern uint32_t esp_rom_Cache_Suspend_ICache(void);
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extern void esp_rom_Cache_Invalidate_ICache_All(void);
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extern int esp_rom_Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,
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uint32_t psize, uint32_t num, uint32_t fixed);
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extern int esp_rom_Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr,
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uint32_t psize, uint32_t num, uint32_t fixed);
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extern void esp_rom_Cache_Resume_ICache(uint32_t autoload);
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extern spiflash_legacy_data_t esp_rom_spiflash_legacy_data;
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extern int esp_rom_gpio_matrix_in(uint32_t gpio, uint32_t signal_index,
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bool inverted);
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extern int esp_rom_gpio_matrix_out(uint32_t gpio, uint32_t signal_index,
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bool out_inverted,
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bool out_enabled_inverted);
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#endif /* _ASMLANGUAGE */
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#endif /* __SOC_H__ */
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