60 lines
1.5 KiB
C
60 lines
1.5 KiB
C
/* gpio_sch.h - Descriptions of registers for Intel SCH GPIO controller */
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/*
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* Copyright (c) 2015 Intel Corporation.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __GPIO_SCH_H__
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#define __GPIO_SCH_H__
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#include <stdint.h>
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#include <nanokernel.h>
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#include <gpio.h>
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#define GPIO_SCH_REG_GEN (0x00)
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#define GPIO_SCH_REG_GIO (0x04)
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#define GPIO_SCH_REG_GLVL (0x08)
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#define GPIO_SCH_REG_GTPE (0x0C)
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#define GPIO_SCH_REG_GTNE (0x10)
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#define GPIO_SCH_REG_GGPE (0x14)
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#define GPIO_SCH_REG_GSMI (0x18)
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#define GPIO_SCH_REG_GTS (0x1C)
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struct gpio_sch_config {
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uint32_t regs;
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uint8_t bits;
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};
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#define GPIO_SCH_POLLING_STACK_SIZE 1024
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#define GPIO_SCH_POLLING_TICKS (sys_clock_ticks_per_sec / 5)
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struct gpio_sch_data {
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char __stack polling_stack[GPIO_SCH_POLLING_STACK_SIZE];
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gpio_callback_t callback;
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struct nano_timer poll_timer;
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uint8_t poll;
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struct {
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uint32_t gtpe;
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uint32_t gtne;
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} int_regs;
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uint32_t cb_enabled;
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uint8_t port_cb;
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};
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#endif /* __GPIO_SCH_H__ */
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