zephyr/dts/arm/st/l4/stm32l412.dtsi

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/*
* Copyright (c) 2020 Aurelien Jarno
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/l4/stm32l4.dtsi>
/ {
soc {
compatible = "st,stm32l412", "st,stm32l4", "simple-bus";
clocks {
clk_hsi48: clk-hsi48 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <DT_FREQ_M(48)>;
status = "disabled";
};
};
rng: rng@50060800 {
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00040000>,
<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
};
usb: usb@40006800 {
compatible = "st,stm32-usb";
reg = <0x40006800 0x40000>;
interrupts = <67 0>;
interrupt-names = "usb";
num-bidir-endpoints = <8>;
ram-size = <1024>;
maximum-speed = "full-speed";
phys = <&usb_fs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>,
<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
status = "disabled";
};
i2c2: i2c@40005800 {
compatible = "st,stm32-i2c-v2";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
clock-frequency = <I2C_BITRATE_STANDARD>;
interrupts = <33 0>, <34 0>;
interrupt-names = "event", "error";
status = "disabled";
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
interrupts = <36 5>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
status = "disabled";
};
usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
resets = <&rctl STM32_RESET(APB1L, 18U)>;
interrupts = <39 0>;
status = "disabled";
};
};
usb_fs_phy: usbphy {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};