zephyr/dts/arm/st/l0/stm32l051.dtsi

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/*
* Copyright (c) 2021 Nomono AS
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/l0/stm32l0.dtsi>
/ {
soc {
compatible = "st,stm32l051", "st,stm32l0", "simple-bus";
i2c2: i2c@40005800 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
interrupts = <24 0>;
interrupt-names = "combined";
status = "disabled";
};
spi2: spi@40003800 {
compatible = "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00004000>;
resets = <&rctl STM32_RESET(APB2, 14U)>;
interrupts = <27 0>;
status = "disabled";
};
timers22: timers@40011400 {
compatible = "st,stm32-timers";
reg = <0x40011400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020>;
resets = <&rctl STM32_RESET(APB2, 5U)>;
interrupts = <22 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
#pwm-cells = <3>;
};
};
timers6: timers@40001000 {
compatible = "st,stm32-timers";
reg = <0x40001000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>;
resets = <&rctl STM32_RESET(APB1, 4U)>;
interrupts = <17 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
};
eeprom: eeprom@8080000{
reg = <0x08080000 DT_SIZE_K(2)>;
};
};
smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};