309 lines
8.2 KiB
Plaintext
309 lines
8.2 KiB
Plaintext
/*
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* Copyright (c) 2023 TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <freq.h>
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#include <arm/armv7-m.dtsi>
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#include <zephyr/dt-bindings/interrupt-controller/renesas-ra-icu.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4";
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reg = <0>;
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};
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};
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clocks {
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mosc: mosc {
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compatible = "fixed-clock";
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clock-frequency = <1200000>;
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status = "disabled";
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#clock-cells = <0>;
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};
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sosc: sosc {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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status = "disabled";
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#clock-cells = <0>;
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};
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hoco: hoco {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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status = "okay";
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#clock-cells = <0>;
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};
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moco: moco {
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compatible = "fixed-clock";
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clock-frequency = <8000000>;
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status = "okay";
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#clock-cells = <0>;
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};
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loco: loco {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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status = "okay";
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#clock-cells = <0>;
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};
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pll: pll {
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compatible = "fixed-factor-clock";
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status = "disabled";
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clocks = <&mosc>;
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clock-div = <2>;
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clock-mult = <8>;
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#clock-cells = <0>;
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};
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};
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sram0: memory0@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 DT_SIZE_K(32)>;
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};
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soc {
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interrupt-parent = <&icu>;
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icu: interrupt-controller@40006000 {
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compatible = "renesas,ra-interrupt-controller-unit";
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reg = <0x40006000 0x40>;
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reg-names = "icu";
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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cgc: cgc@4001e000 {
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compatible = "renesas,ra-clock-generation-circuit";
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reg = <0x4001e000 0x40 0x40047000 0x10>;
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reg-names = "system", "mstp";
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#clock-cells = <1>;
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clock-source = <&moco>;
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iclk-div = <16>;
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pclka-div = <16>;
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pclkb-div = <16>;
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pclkc-div = <16>;
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pclkd-div = <16>;
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fclk-div = <16>;
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};
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fcu: flash-controller@4001c000 {
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compatible = "renesas,ra-flash-controller";
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reg = <0x4001c000 0x44>;
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reg-names = "fcache";
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash0@0 {
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compatible = "soc-nv-flash";
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reg = <0x00000000 DT_SIZE_K(256)>;
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};
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flash1: flash1@40100000 {
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compatible = "soc-nv-flash";
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reg = <0x40100000 DT_SIZE_K(8)>;
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};
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};
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ioport0: gpio@40040000 {
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compatible = "renesas,ra-gpio";
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reg = <0x40040000 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ2>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ3>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ6>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ7>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ10>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ15>;
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interrupt-names = "port-irq2", "port-irq3", "port-irq6",
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"port-irq7", "port-irq10", "port-irq15";
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port-irq2-pins = <2>;
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port-irq3-pins = <4>;
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port-irq6-pins = <0>;
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port-irq7-pins = <1 15>;
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port-irq10-pins = <5>;
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port-irq15-pins = <11>;
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status = "disabled";
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};
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ioport1: gpio@40040020 {
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compatible = "renesas,ra-gpio";
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reg = <0x40040020 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ0>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ1>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ2>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ3>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ4>;
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interrupt-names = "port-irq0", "port-irq1", "port-irq2",
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"port-irq3", "port-irq4";
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port-irq0-pins = <5>;
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port-irq1-pins = <1>;
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port-irq2-pins = <0>;
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port-irq3-pins = <10>;
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port-irq4-pins = <11>;
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ngpios = <16>;
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status = "disabled";
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};
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ioport2: gpio@40040040 {
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compatible = "renesas,ra-gpio";
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reg = <0x40040040 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ0>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ1>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ2>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ3>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ9>;
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interrupt-names = "port-irq0", "port-irq1", "port-irq2",
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"port-irq3", "port-irq9";
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port-irq0-pins = <6>;
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port-irq1-pins = <5>;
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port-irq2-pins = <13>;
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port-irq3-pins = <12>;
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status = "disabled";
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};
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ioport3: gpio@40040060 {
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compatible = "renesas,ra-gpio";
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reg = <0x40040060 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ5>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ6>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ8>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ9>;
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interrupt-names = "port-irq5", "port-irq6", "port-irq8", "port-irq9";
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port-irq5-pins = <2>;
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port-irq6-pins = <1>;
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port-irq8-pins = <5>;
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port-irq9-pins = <4>;
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status = "disabled";
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};
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ioport4: gpio@40040080 {
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compatible = "renesas,ra-gpio";
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reg = <0x40040080 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ0>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ4>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ5>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ6>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ7>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ8>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ9>;
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interrupt-names = "port-irq0", "port-irq4", "port-irq5", "port-irq6",
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"port-irq7", "port-irq8", "port-irq9";
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port-irq0-pins = <0>;
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port-irq4-pins = <2 11>;
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port-irq5-pins = <1 10>;
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port-irq6-pins = <9>;
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port-irq7-pins = <8>;
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port-irq8-pins = <15>;
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port-irq9-pins = <14>;
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status = "disabled";
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};
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ioport5: gpio@400400a0 {
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compatible = "renesas,ra-gpio";
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reg = <0x400400a0 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ11>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ12>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ14>;
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interrupt-names = "port-irq11", "port-irq12", "port-irq14";
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port-irq11-pins = <1>;
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port-irq12-pins = <2>;
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port-irq14-pins = <5>;
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status = "disabled";
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};
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pinctrl: pinctrl@40040800 {
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compatible = "renesas,ra-pinctrl";
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reg = <0x40040800 0x500 0x40040d03 0x1>;
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reg-names = "pfs", "pmisc_pwpr";
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status = "okay";
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};
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sci0: sci@40070000 {
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compatible = "renesas,ra-sci";
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reg = <0x40070000 0x20>;
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interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_RXI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_TXI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_TEI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_ERI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_AM>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_RXI_OR_ERI>;
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interrupt-names = "rxi", "txi", "tei", "eri", "am", "rxi-or-eri";
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clocks = <&cgc RA_CLOCK_SCI(0)>;
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#clock-cells = <1>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-uart-sci";
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status = "disabled";
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};
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};
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sci1: sci@40070020 {
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compatible = "renesas,ra-sci";
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reg = <0x40070020 0x20>;
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interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_RXI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_TXI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_TEI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_ERI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_AM>;
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interrupt-names = "rxi", "txi", "tei", "eri", "am";
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clocks = <&cgc RA_CLOCK_SCI(1)>;
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#clock-cells = <1>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-uart-sci";
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status = "disabled";
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};
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};
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sci9: sci@40070120 {
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compatible = "renesas,ra-sci";
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reg = <0x40070120 0x20>;
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interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_RXI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_TXI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_TEI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_ERI>,
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<RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_AM>;
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interrupt-names = "rxi", "txi", "tei", "eri", "am";
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clocks = <&cgc RA_CLOCK_SCI(9)>;
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#clock-cells = <1>;
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status = "disabled";
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uart {
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compatible = "renesas,ra-uart-sci";
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status = "disabled";
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};
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <4>;
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};
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