56 lines
924 B
Plaintext
56 lines
924 B
Plaintext
/*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Copyright (c) 2021 ASPEED Technology Inc.
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*/
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#include <arm/armv7-m.dtsi>
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#include <mem.h>
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#include <zephyr/dt-bindings/clock/ast10x0_clock.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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};
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};
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sram0: memory@0 {
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compatible = "mmio-sram";
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};
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soc {
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syscon: syscon@7e6e2000 {
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compatible = "syscon";
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reg = <0x7e6e2000 0x1000>;
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sysclk: sysclk {
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compatible = "aspeed,ast10x0-clock";
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#clock-cells = <1>;
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};
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sysrst: sysrst {
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compatible = "aspeed,ast10x0-reset";
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#reset-cells = <1>;
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};
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};
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uart5: serial@7e784000 {
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compatible = "ns16550";
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reg = <0x7e784000 0x1000>;
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interrupts = <8 0>;
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clocks = <&sysclk ASPEED_CLK_UART5>;
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status = "disabled";
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reg-shift = <2>;
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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